公开(公告)号：WO2011079880A1

公开(公告)日：2011-07-07

申请号：PCT/EP2010/005929

申请日：2010-09-29

Applicant: STMICROELECTRONICS S.R.L. ,  BOTTAREL, Valeria ,  RICOTTI, Giulio ,  QUAGLIA, Fabio ,  GIOVANNONE, Juri

Inventor： BOTTAREL, Valeria ,  RICOTTI, Giulio ,  QUAGLIA, Fabio ,  GIOVANNONE, Juri

IPC: H03K17/693 ,  H03K17/74 ,  H03K17/06 ,  H03K17/687 ,  B06B1/02 ,  H03K17/0812

CPC classification number: H03K17/693 ,  B06B1/0215 ,  H03K17/06 ,  H03K17/08122 ,  H03K17/6872 ,  H03K17/74

Abstract: A low voltage isolation switch (1) is described, inserted between an input terminal (HVout) suitable for receiving a high voltage signal (IM) and an output terminal (pzt) suitable for transmitting this high voltage signal (IM) to a load (PZ) of the type comprising at least one driving block (5) being inserted between a first and a second voltage reference (Vss, -Vss) and comprising a first driving transistor (M1), inserted, in series to a first driving diode (D1), between the first voltage reference (Vss) and a first driving central circuit node (Xd) and a second driving transistor (M2), in turn inserted, in series with a second driving diode (D2), between the driving central circuit node (Xd) and the second supply voltage reference (-Vss) as well as a control transistor (MD) connected across a diode block (7) comprising at least one first and one second transmission diode (DN1, DN2), connected in antiparallel, i.e. by having the anode terminal of the first diode connected to the cathode terminal of the second one and vice versa, between the input (HVout) and output (pzt) terminals of the low voltage isolation switch (1), this control transistor (MD) having a control terminal connected to the driving central circuit node (Xd) through a low voltage decoupling block (6), in turn inserted between a first and a second substrate terminal (SS1, SS2) and also comprising a first and a second parasite capacitive element (Par1, Par2) connected to these first and second substrate terminals (SS1, SS2) as well as comprising at least one first decoupling transistor (M3) and one second decoupling transistor inserted (M4), being in parallel to each other and having control terminals connected to the first and second parasite capacitive elements (Par1, Par2), respectively.

Abstract translation: 描述了将低电压隔离开关（1）插入适于接收高电压信号（IM）的输入端（HVout）和适于将该高电压信号（IM）发送到负载的输出端（pzt）之间 PZ），其包括插入在第一和第二参考电压（Vss，-Vss）之间的至少一个驱动块（5），并且包括与第一驱动二极管串联插入的第一驱动晶体管（M1） D1），在第一电压基准（Vss）和第一驱动中心电路节点（Xd）和第二驱动晶体管（M2）之间，与第二驱动二极管（D2）串联插入驱动中心电路 节点（Xd）和第二电源电压参考（-Vss）以及连接在二极管块（7）之间的控制晶体管（MD），二极管块（7）包括至少一个第一和第二传输二极管（DN1，DN2），反相并联 即通过使第一二极管的阳极端子连接到阴极 在低电压隔离开关（1）的输入（HVout）和输出（pzt）端子之间，该控制晶体管（MD）具有连接到驱动中心电路节点的控制端（ Xd）通过低电压去耦块（6）进而插入在第一和第二衬底端子（SS1，SS2）之间，并且还包括连接到这些第一和第二衬底端子的第一和第二寄生电容元件（Par1，Par2） 衬底端子（SS1，SS2）以及包括彼此并联并具有连接到第一和第二寄生电容元件的控制端子的至少一个第一去耦晶体管（M3）和一个第二去耦晶体管（M4） Par1，Par2）。

公开(公告)号：WO2011063974A1

公开(公告)日：2011-06-03

申请号：PCT/EP2010/007185

申请日：2010-11-26

Applicant: STMICROELECTRONICS S.R.L. ,  RICOTTI, Giulio ,  ROSSI, Sandro

Inventor： RICOTTI, Giulio ,  ROSSI, Sandro

IPC: H03K3/355

CPC classification number: H03K3/355

Abstract: It is described a driving circuit (1) having at least one output terminal (OUT) connected to an ultrasonic pulse generator circuit and providing thereto with an output voltage (Vout), characterized in that it comprises at least one first portion (2A) connected to a first voltage reference (VPH) and including at least one first output transistor (MOP) being inserted between the first voltage reference (VPH) and the output terminal (OUT), such a first portion (2A) further comprising: at least one first high voltage comparator (3A) being connected to said output terminal (OUT) and to a first threshold voltage reference (VTHP), at least one first start-up circuit (4A) being controlled by a first setting signal (SETP); at least one first switching ON /OFF circuit (5A) being connected at its input to the first start-up circuit (4A), in correspondence with a first internal circuit node (XP), and to the first high voltage comparator (3A), in correspondence with a second internal circuit node (YP), and at its output to a control terminal of the first output transistor (MOP); the first start-up circuit (4A) providing a switching on signal (ONA) to the first switching on/ off circuit (5A) while the high voltage comparator (3A) provides a switching off signal (OFFA) to the first switching on/ off circuit (5A) which causes the switching off of the output transistor (MOP), the high voltage comparator (3A) generating the switching off signal (OFFA) when the output voltage (Vout) reaches a first desired supply voltage value which depends on the value of the first threshold voltage reference (VTHP).

Abstract translation: 描述了具有连接到超声波脉冲发生器电路并向其提供输出电压（Vout）的至少一个输出端子（OUT）的驱动电路（1），其特征在于它包括至少一个连接的第一部分（2A） 至少一个第一输出晶体管（MOP）被插入在第一参考电压（VPH）和输出端子（OUT）之间，所述第一部分（2A）还包括：至少一个 第一高压比较器（3A）连接到所述输出端（OUT）和第一阈值电压基准（VTHP），至少一个第一启动电路（4A）由第一设置信号（SETP）控制; 至少一个第一开关ON / OFF电路（5A）在其输入端与第一内部电路节点（XP）相对应地连接到第一启动电路（4A），并连接到第一高电压比较器（3A） 对应于第二内部电路节点（YP），并且在其输出端与第一输出晶体管（MOP）的控制端相对应; 所述第一启动电路（4A）向所述第一开关导通/断开电路（5A）提供开启信号（ONA），同时所述高电压比较器（3A）向所述第一开关导通/断开电路提供断开信号（OFFA） 关闭电路（5A），当输出电压（Vout）达到第一期望的电源电压值时，高电压比较器（3A）产生关断信号（OFFA），导致关闭输出晶体管（MOP） 第一阈值电压基准值（VTHP）。

公开(公告)号：WO2007032032A8

公开(公告)日：2007-10-04

申请号：PCT/IT2005000529

申请日：2005-09-16

Applicant: ST MICROELECTRONICS SRL ,  MURARI BRUNO ,  RICOTTI GIULIO ,  DELLA TORRE LUIGI ,  VITALI ANDREA LORENZO

Inventor： MURARI BRUNO ,  RICOTTI GIULIO ,  DELLA TORRE LUIGI ,  VITALI ANDREA LORENZO

IPC: G01L1/02 ,  G01L9/00

CPC classification number: G01L9/0054 ,  G01L1/02 ,  G01L5/225 ,  G01L9/0045 ,  G01L9/0089 ,  G01L19/0645 ,  G01L19/146

Abstract: In a pressure sensor (35), a pressure-sensor element (10) has a monolithic body (12) of semiconductor material, and a first main face (12a) and a second main face (12b) acting on which is a stress resulting from a pressure (P) the value of which is to be determined; and a package (36) encloses the pressure-sensor element (10). The package (36) has an inner chamber (37) containing liquid material (38), and the pressure-sensor element (10) is arranged within the inner chamber (37) in such a manner that the first and second main faces (12a, 12b) are both in contact with the liquid material (38). In particular, the liquid material is a silicone gel.

Abstract translation: 在压力传感器（35）中，压力传感器元件（10）具有半导体材料的整体（12），并且作用于其上的应力产生的第一主面（12a）和第二主面（12b） 从压力（P）来确定其值; 并且包装（36）包围压力传感器元件（10）。 包装（36）具有容纳液体材料（38）的内室（37），并且压力传感器元件（10）以这样的方式设置在内室（37）内，使得第一和第二主面 ，12b）均与液体材料（38）接触。 特别地，液体材料是硅胶。

公开(公告)号：WO2011063873A1

公开(公告)日：2011-06-03

申请号：PCT/EP2010/005928

申请日：2010-09-29

Applicant: STMICROELECTRONICS S.R.L. ,  ALBERTINI, Matteo ,  RONCHI, Daniele ,  ROSSI, Sandro ,  RICOTTI, Giulio

Inventor： ALBERTINI, Matteo ,  RONCHI, Daniele ,  ROSSI, Sandro ,  RICOTTI, Giulio

IPC: H03F3/45 ,  H03G1/00

CPC classification number: H03F3/45183 ,  H03F3/45098 ,  H03F2200/294 ,  H03F2200/453 ,  H03F2203/45492 ,  H03F2203/45674

Abstract: The invention relates to a driving method for obtaining a linear gain variation of a transconductance amplifier, of the type comprising at least one differential transistor cell, with adjustment of a driving voltage value (Vtgc1) of a degenerative driving transistor (MD1) of said transconductance amplifier, comprising the steps of : generating an output current signal of a differential cell (11) being a copy of said differential transistor cell of said transconductance amplifier, said output current signal having a linear relationship with a transconductance value of said copy differential cell (11) as said driving voltage (Vtgc1) varies; generating a reference current signal having a linear relationship with a differential input voltage; comparing said output current signal and said reference current signal for adjusting said driving voltage value (Vtgc1) and modifying said transconductance value of said copy differential cell (11) up to a balance of said current signals.

Abstract translation: 本发明涉及一种用于获得包括至少一个差分晶体管单元的类型的跨导放大器的线性增益变化的驱动方法，其中调节所述跨导的退化驱动晶体管（MD1）的驱动电压值（Vtgc1） 放大器，包括以下步骤：产生作为所述跨导放大器的所述差分晶体管单元的副本的差分单元（11）的输出电流信号，所述输出电流信号与所述复制差分单元的跨导值具有线性关系（ 11），因为所述驱动电压（Vtgc1）变化; 产生与差分输入电压具有线性关系的参考电流信号; 比较所述输出电流信号和所述参考电流信号，用于调节所述驱动电压值（Vtgc1），并修改所述复制差分单元（11）的所述跨导值直到所述电流信号的平衡。

公开(公告)号：WO2008120256A1

公开(公告)日：2008-10-09

申请号：PCT/IT2007/000252

申请日：2007-04-03

Applicant: STMICROELECTRONICS S.R.L. ,  MURARI, Bruno ,  MASTROMATTEO, Ubaldo ,  RICOTTI, Giulio

Inventor： MURARI, Bruno ,  MASTROMATTEO, Ubaldo ,  RICOTTI, Giulio

IPC: H02N1/00

CPC classification number: H02N1/006

Abstract: An electrostatic micromotor (10') is provided with a fixed substrate (12), a mobile substrate (13) facing the fixed substrate (12), and electrostatic-interaction elements (14, 15, 17) enabling a relative movement of the mobile substrate (3) with respect to the fixed substrate (2) in a movement direction (x); the electrostatic micromotor is also provided with a capacitive position-sensing structure (18') configured to enable sensing of a relative position of the mobile substrate (13) with respect to the fixed substrate (12) in the movement direction (x). The capacitive position-sensing structure (18') is formed by at least one sensing indentation (22), extending within the mobile substrate (13) from a first surface (13a; 13b) thereof, and by at least one first sensing electrode (24), facing, in at least one given operating condition, the sensing indentation (22).

Abstract translation: 静电微电机（10'）设置有固定基板（12），面向固定基板（12）的移动基板（13）和静电相互作用元件（14,15,17），其能够使移动体 基板（3）相对于固定基板（2）在移动方向（x）上移动; 静电微型电动机还设置有电容位置感测结构（18'），其被配置为能够在移动方向（x）上感测移动衬底（13）相对于固定衬底（12）的相对位置。 电容式位置感测结构（18'）由至少一个感测压痕（22）形成，其从移动衬底（13）的第一表面（13a; 13b）延伸，并由至少一个第一感测电极 在至少一个给定的操作条件下面对感测缩进（22）。

公开(公告)号：WO2011079883A1

公开(公告)日：2011-07-07

申请号：PCT/EP2010/005932

申请日：2010-09-29

Applicant: STMICROELECTRONICS S.R.L. ,  ROSSI, Sandro ,  RICOTTI, Giulio

Inventor： ROSSI, Sandro ,  RICOTTI, Giulio

IPC: H03K17/0416 ,  H03K17/16 ,  H03K17/74 ,  B06B1/02

CPC classification number: H03K17/74 ,  B06B1/0215 ,  H03K17/04163 ,  H03K17/161

Abstract: A transmission channel (1) is described of the type comprising at least one high voltage buffer block (4) comprising buffer transistors (MB1, MB2, MB3, MB4) and respective buffer diodes (DB1, DB2, DB3, DB4), being inserted between respective voltage references (HVPO, HVP1, HVMO, HVM1), these buffer transistors (MB1, MB2, MB3, MB4) being also connected to a clamping block (5), in turn comprising clamping transistors (MC1, MC2) connected to at least one output terminal (HVout) of this transmission channel through diodes (DC1, DC2) connected to prevent the body diodes of the clamping transistors (MC1, MC2) from conducting. Advantageously according to the invention, the transmission channel (1) comprises at least one reset circuit (20) comprising diodes (DME1, DME2, DME3, DME4) and being inserted between circuit nodes (XME1, XME2, XME3, XME4, XC1, XC2) of the high voltage buffer block (4) and of the clamping block (5), these circuit nodes (XME1, XME2, XME3, XME4, XC1, XC2) being in correspondence with conduction terminals of the transistors (MB l, MB2, MB3, MB4; MC1, MC2) comprised into the high voltage buffer block (4) and into the clamping block (5).

Abstract translation: 描述了包括至少一个包括缓冲晶体管（MB1，MB2，MB3，MB4）和相应的缓冲二极管（DB1，DB2，DB3，DB4）的高压缓冲块（4）的传输通道（1） 在相应的电压基准（HVPO，HVP1，HVMO，HVM1）之间，这些缓冲晶体管（MB1，MB2，MB3，MB4）也连接到钳位块（5），反过来又包括钳位晶体管（MC1，MC2） 所述传输通道的至少一个输出端子（HVout）通过连接的二极管（DC1，DC2），以防止钳位晶体管（MC1，MC2）的体二极管导通。 有利地，根据本发明，传输通道（1）包括至少一个包括二极管（DME1，DME2，DME3，DME4）的复位电路（20），并且插入在电路节点（XME1，XME2，XME3，XME4，XC1，XC2 ）和高压缓冲块（4）和钳位块（5）的这些电路节点（XME1，XME2，XME3，XME4，XC1，XC2）与晶体管（MB1，MB2， MB3，MB4; MC1，MC2）组成高压缓冲块（4）并进入夹紧块（5）。

公开(公告)号：WO2007032032A1

公开(公告)日：2007-03-22

申请号：PCT/IT2005/000529

申请日：2005-09-16

Applicant: STMICROELECTRONICS S.R.L. ,  MURARI, Bruno ,  RICOTTI, Giulio ,  DELLA TORRE, Luigi ,  VITALI, Andrea, Lorenzo

Inventor： MURARI, Bruno ,  RICOTTI, Giulio ,  DELLA TORRE, Luigi ,  VITALI, Andrea, Lorenzo

IPC: G01L1/02 ,  G01L9/00

CPC classification number: G01L9/0054 ,  G01L1/02 ,  G01L5/225 ,  G01L9/0045 ,  G01L9/0089 ,  G01L19/0645 ,  G01L19/146

Abstract: In a pressure sensor (35) , a pressure-sensor element (10) has a monolithic body (12) of semiconductor material, and a first main face (12a) and a second main face (12b) acting on which is a stress resulting from a pressure (P) the value of which is to be determined; and a package (36) encloses the pressure­sensor element (10) . The package (36) has an inner chamber (37) containing liquid material (38), and the -ores sure-sensor element (10) is arranged within the inner chamber (37) in such a manner that the first and second main faces (12a, 12b) are both in contact with the liquid material (38). In particular, the liquid material is a silicone gel.

Abstract translation: 在压力传感器（35）中，压力传感器元件（10）具有半导体材料的整体（12），并且作用于其上的应力产生的第一主面（12a）和第二主面（12b） 从压力（P）来确定其值; 并且包装（36）包围所述压力传感器元件（10）。 包装（36）具有容纳液体材料（38）的内部室（37），并且 - 确定传感器元件（10）以这样的方式设置在内部室（37）内，使得第一和第二主要面 （12a，12b）都与液体材料（38）接触。 特别地，液体材料是硅胶。

公开(公告)号：WO2007010574A1

公开(公告)日：2007-01-25

申请号：PCT/IT2005/000435

申请日：2005-07-22

Applicant: STMICROELECTRONICS S.R.L. ,  RICOTTI, Giulio ,  MORELLI, Marco ,  DELLA TORRE, Luigi ,  VITALI, Andrea, Lorenzo

Inventor： RICOTTI, Giulio ,  MORELLI, Marco ,  DELLA TORRE, Luigi ,  VITALI, Andrea, Lorenzo

IPC: G01L1/18 ,  G01L9/00 ,  G01L9/06

CPC classification number: G01L1/18 ,  B60T2270/82

Abstract: In an integrated pressure sensor (15) with a high full-scale value, a monolithic body (16) of semiconductor material has a first and a second main surface (16a and 16b), opposite and separated by a substantially uniform distance (w). The monolithic body (16) has a bulk region (17), having a sensitive portion (23) next to the first main surface (16a), upon which pressure (P) acts. A first piezoresistive detection element (18) is integrated in the sensitive portion (23) and has a variable resistance as a function of the pressure (P). The bulk region (17) is a solid and compact region and has a thickness substantially equal to the distance (w).

Abstract translation: 在具有高满量程值的集成压力传感器（15）中，半导体材料的整体（16）具有第一和第二主表面（16a和16b），所述第一和第二主表面相对并分开大致均匀的距离（w） 。 整体式主体（16）具有主体区域（17），其具有靠近第一主表面（16a）的敏感部分（23），压力（P）作用在该区域上。 第一压阻检测元件（18）集成在敏感部分（23）中并且具有作为压力（P）的函数的可变电阻。 本体区域（17）是实心且紧凑的区域，其厚度基本上等于距离（w）。

公开(公告)号：WO2012085951A1

公开(公告)日：2012-06-28

申请号：PCT/IT2010/000511

申请日：2010-12-23

Applicant: STMICROELECTRONICS S.R.L. ,  BOTTAREL, Valeria ,  RICOTTI, Giulio ,  QUAGLIA, Fabio

Inventor： BOTTAREL, Valeria ,  RICOTTI, Giulio ,  QUAGLIA, Fabio

IPC: H03K17/081 ,  H03K17/30 ,  G01S7/52 ,  B06B1/02

CPC classification number: H03K17/16 ,  H03K17/08104 ,  H03K17/30

Abstract: A low voltage isolation circuit (1) is described inserted between a connection node (HVout) to a matrix (2) of switches suitable for receiving a high voltage signal (IM) and a connection terminal (pzt) to a load (PZ) suitable for transmitting said high voltage signal (IM) to said load (PZ) of the type comprising at least one driving block (5) inserted between a first and a second voltage reference (Vss, - Vss) and comprising at least a first driving transistor (M l), inserted, in series with a first driving diode (Dl), between the first voltage reference (Vss) and a first driving central circuit node (Xc) and a second driving transistor (M2), in turn inserted, in series with a second diode (D2), between the driving central circuit node (Xc) and the second supply voltage reference (-Vss). The switch comprises an isolation block (8) connected to the connection terminal (pzt), to the connection node (HVout) and to the driving central circuit node (Xc) and comprising at least one voltage limiter block (6), a diode block (7) and a control transistor (MD), in turn connected across the diode block (7) between the connection node (HVout) to the matrix (2) of switches and the connection terminal (pzt) to the load (PZ) of the low voltage isolation switch (1) and having a control terminal (XD) connected to the driving central circuit node (Xc).

Abstract translation: 描述了一种低电压隔离电路（1），其插入到适于接收高电压信号（IM）的开关的矩阵（2）的连接节点（HVout）和适合于负载（PZ）的连接端子（pzt）之间 用于将所述高电压信号（IM）发送到包括插入在第一和第二参考电压（Vss，-Vss）之间的至少一个驱动块（5）的类型的所述负载（PZ），并且至少包括第一驱动晶体管 （M1）与第一驱动二极管（D1）串联插入在第一电压基准（Vss）和第一驱动中心电路节点（Xc）和第二驱动晶体管（M2）之间，然后插入 与驱动中心电路节点（Xc）和第二电源电压基准（-Vss）之间的第二二极管（D2）串联。 开关包括连接到连接端子（pzt）的隔离块（8），连接节点（HVout）和驱动中心电路节点（Xc），并且包括至少一个限压器块（6），二极管块 （7）和控制晶体管（MD），它们连接在连接节点（HVout）与开关矩阵（2）之间的二极管块（7）和连接端子（pzt）与负载（PZ）之间 低电压隔离开关（1）并具有连接到驱动中心电路节点（Xc）的控制端子（XD）。

公开(公告)号：WO2011088853A1

公开(公告)日：2011-07-28

申请号：PCT/EP2010/005927

申请日：2010-09-29

Applicant: STMICROELECTRONICS S.R.L. ,  ROSSI, Sandro ,  RICOTTI, Giulio ,  GHISU Davide Ugo ,  RICCIARDO, Antonio

Inventor： ROSSI, Sandro ,  RICOTTI, Giulio ,  GHISU Davide Ugo ,  RICCIARDO, Antonio

IPC: H03K17/06 ,  H03K17/687 ,  H03K17/74 ,  B06B1/02 ,  H03K17/0416 ,  H03K17/16

CPC classification number: H03K17/06 ,  H03K17/04163 ,  H03K17/161 ,  H03K17/6872 ,  H03K17/74

Abstract: A transmission channel (1) is described comprising at least one high voltage buffer block (4) comprising buffer transistors (MB1, MB2, MB3, MB4) and respective buffer diodes (DB1, DB2, DB3, DB4), being inserted between respective voltage references (HVP0, HVP1, HVM0, HVM1), a clamping circuit (10) being connected to a first output terminal (HVout) of the transmission channel (1), an antinoise block (6) being connected between the first output terminal (HVout) and a connection terminal (Xdcr) of the transmission channel (1); as well as a switching circuit (30) being inserted between the connection terminal (Xdcr) and a second output terminal (LVout) of the transmission channel (1). Advantageously according to the invention, the clamping circuit (10) comprises a clamping core (11), a reset circuit (20) comprising diodes (DME1, DME2, DME3, DME4 ) inserted between circuit nodes (XME1, XME2, XME3, XME4, XC1, XC2) of the high voltage buffer block (4) and of the clamping circuit (10), the circuit nodes (XME1, XME2, XME3, XME4, XC1, XC2 ) being in correspondance with conduction terminals of said transistors (MB1,MB2,MB3,MB4,MC1,MC2) comprised into the high voltage buffer block(4) and into the clamping circuit (10), and a switching circuit (30).

Abstract translation: 描述了传输通道（1），其包括至少一个包括缓冲晶体管（MB1，MB2，MB3，MB4）和相应的缓冲二极管（DB1，DB2，DB3，DB4）的高压缓冲块（4） 参考（HVP0，HVP1，HVM0，HVM1），与传输通道（1）的第一输出端子（HVout）连接的钳位电路（10），连接在第一输出端子 ）和传输信道（1）的连接终端（Xdcr）; 以及插入在传输通道（1）的连接端子（Xdcr）和第二输出端子（LVout）之间的开关电路（30）。 有利地，根据本发明，夹紧电路（10）包括夹紧芯（11），复位电路（20），其包括插入在电路节点（XME1，XME2，XME3，XME4，XME3，DME3， 高电压缓冲块（4）和钳位电路（10）的电路节点（XME1，XME2，XME3，XME4，XC1，XC2）与所述晶体管（MB1，XC1，XC2）的导通端子相对应， MB2，MB3，MB4，MC1，MC2）以及开关电路（30），其特征在于，包括高压缓冲块（4）和钳位电路（10）。