公开(公告)号：WO2009039014A1

公开(公告)日：2009-03-26

申请号：PCT/US2008/075891

申请日：2008-09-10

Applicant: MICROSEMI CORPORATION ,  TSANG, Dah, Wen ,  SDRULLA, Dumitru ,  ZHANG, Jinshu

Inventor： TSANG, Dah, Wen ,  SDRULLA, Dumitru ,  ZHANG, Jinshu

IPC: H01L29/00

CPC classification number: H01L29/66712 ,  H01L21/761 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/0878 ,  H01L29/404 ,  H01L29/7811

Abstract: High voltage semiconductor devices with high-voltage termination structures (100, 200, 300) are constructed on lightly doped substrates (12). Lightly doped p-type substrates (12) are particularly prone to depletion and inversion from positive charges, degrading the ability of associated termination structures to block high voltages. To improve the efficiency and stability of termination structures, second termination regions (23, 223, 323) of the same dopant type as the substrate (12), more heavily doped than the substrate (12) but more lightly doped than first termination regions (22), are positioned adjoining the first termination regions (22). The second termination regions raise the field threshold voltage where the surface is vulnerable and render the termination structure (110) substantially insensitive to positive charges at the surface. The use of higher dopant concentration in the gap region without causing premature avalanche is facilitated by only creating second termination regions (323) for regions lacking field plate (10) protection.

Abstract translation: 具有高电压端接结构（100,200,300）的高电压半导体器件构造在轻掺杂衬底（12）上。 轻掺杂的p型衬底（12）特别容易从正电荷中消耗和反转，降低了相关终端结构阻挡高电压的能力。 为了提高端接结构的效率和稳定性，与衬底（12）相同的掺杂剂类型的第二端接区域（23,223,323）比衬底（12）掺杂更多，但比第一端接区域更轻掺杂 22）定位成邻接第一端接区域（22）。 第二终端区域提高场表面易受伤害的场阈值电压，并使端接结构（110）对表面的正电荷基本不敏感。 通过仅为缺少场板（10）保护的区域创建第二终止区域（323），便于在间隙区域中使用更高的掺杂剂浓度而不引起过早的雪崩。

公开(公告)号：WO2012054032A8

公开(公告)日：2012-04-26

申请号：PCT/US2010/053423

申请日：2010-10-20

Applicant: MICROSEMI CORPORATION ,  ZHAO, Feng ,  ODEKIRK, Bruce ,  SDRULLA, Dumitru

Inventor： ZHAO, Feng ,  ODEKIRK, Bruce ,  SDRULLA, Dumitru

IPC: H01L21/329 ,  H01L29/872

Abstract: A merged PN/Schottky diode is provided having a substrate of a first conductivity type and a grid of doped wells of the second conductivity type embedded in the substrate. A Schottky barrier metal layer makes a Schottky barrier contact with the surface of the substrate above the grid. Selected embedded wells in the grid may contact the Schottky barrier metal layer, while most embedded wells do not. The diode forward voltage drop is reduced for the same diode area with reverse blocking benefits similar to a conventional JBS structure.

公开(公告)号：WO2012054032A1

公开(公告)日：2012-04-26

申请号：PCT/US2010053423

申请日：2010-10-20

Applicant: MICROSEMI CORP ,  ZHAO FENG ,  ODEKIRL BRUCE ,  SDRULLA DUMITRU

Inventor： ZHAO FENG ,  ODEKIRL BRUCE ,  SDRULLA DUMITRU

IPC: H01L21/329 ,  H01L29/872

CPC classification number: H01L29/872 ,  H01L23/3192 ,  H01L24/05 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/22 ,  H01L29/66143 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05567 ,  H01L2224/06181 ,  H01L2924/00014 ,  H01L2924/12032 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A merged PN/Schottky diode is provided having a substrate of a first conductivity type and a grid of doped wells of the second conductivity type embedded in the substrate. A Schottky barrier metal layer makes a Schottky barrier contact with the surface of the substrate above the grid. Selected embedded wells in the grid may contact the Schottky barrier metal layer, while most embedded wells do not. The diode forward voltage drop is reduced for the same diode area with reverse blocking benefits similar to a conventional JBS structure.

Abstract translation: 提供合并的PN /肖特基二极管，其具有嵌入在衬底中的第一导电类型的衬底和第二导电类型的掺杂阱的栅格。 肖特基势垒金属层使得肖特基势垒与栅格上方的衬底表面接触。 网格中选定的嵌入式井可能会与肖特基势垒金属层接触，而大多数嵌入式井则不会。 对于相同的二极管面积，二极管正向压降减小，具有类似于常规JBS结构的反向阻塞优点。