公开(公告)号：WO2014168603A1

公开(公告)日：2014-10-16

申请号：PCT/US2013/035584

申请日：2013-04-08

Applicant: VIOLIN MEMORY, INC.

Inventor： DE LA IGLESIA, Erik ,  SIKDAR, Som

IPC: G06F12/02 ,  G06F12/06 ,  G06F13/14 ,  G11C7/10

CPC classification number: G06F12/0246 ,  G06F2212/7202

Abstract: A storage system creates an abstraction of flash Solid State Device (SSD) media allowing random write operations of arbitrary size by a user while performing large sequential write operations of a uniform size to an SSD array. This reduces the number of random write operations performed in the SSD array and as a result increases performance of the SSD array. A control element determines when blocks from different buffers should be combined together or discarded based on fragmentation and read activity. This optimization scheme increases memory capacity and improves memory utilization and performance.

Abstract translation: 存储系统创建闪存固态设备（SSD）介质的抽象，允许用户随机写入任意大小的写入操作，同时对SSD阵列执行大小的均匀大小的顺序写入操作。 这减少了在SSD阵列中执行的随机写入操作的数量，结果增加了SSD阵列的性能。 控制元素确定来自不同缓冲区的块何时应该基于分段和读取活动组合在一起或丢弃。 该优化方案增加了内存容量，并提高了内存利用率和性能。

公开(公告)号：WO2014110095A1

公开(公告)日：2014-07-17

申请号：PCT/US2014/010624

申请日：2014-01-08

Applicant: VIOLIN MEMORY INC.

Inventor： BENNETT, Jon, C.R.

IPC: G06F12/02 ,  G06F12/06

CPC classification number: G06F12/0246 ,  G06F12/06 ,  G06F2212/7201 ,  G06F2212/7205

Abstract: A system and method of storing data in a semiconductor-type non-volatile memory is described, where a physical storage address of data is made available to a user application such as a file system and where characteristics of the memory system that may be allocated on a physical or a logical basis to a user are separately characterizable as to performance, size, redundancy, or the like. A read request to the memory system may be serviced by accessing the physical address included in the read request rather than using a logical-to-physical address lookup in the memory system. Garbage collection operations may be performed on a virtual-physical-block basis to preserve the relationship between the physical address known to the user and the actual physical location of the data.

Abstract translation: 描述了将数据存储在半导体型非易失性存储器中的系统和方法，其中数据的物理存储地址对诸如文件系统的用户应用可用，并且可以分配在存储器系统上的特性 对用户的物理或逻辑基础可以分别表现为性能，大小，冗余等。 可以通过访问读请求中包括的物理地址而不是在存储器系统中使用逻辑到物理地址查找来对存储器系统的读请求进行服务。 可以在虚拟物理块的基础上执行垃圾收集操作，以保留用户已知的物理地址与数据的实际物理位置之间的关系。

公开(公告)号：WO2014047609A1

公开(公告)日：2014-03-27

申请号：PCT/US2013/061293

申请日：2013-09-24

Applicant: VIOLIN MEMORY INC.

Inventor： PIGNATELLI, David, J.

IPC: G06F3/06 ,  G06F12/00

CPC classification number: G06F12/1009 ,  G06F3/0628 ,  G06F3/0662 ,  G06F3/0689 ,  G06F12/0246 ,  G06F12/0292

Abstract: A method of relating the user logical block address(LBA) of a page of user data to the physical block address (PBA) where the data is stored in a RAIDed architecture reduces to size of the tables by constraining the location to which data of a plurality of LBAs may be written. Chunks of data from a plurality of LBAs may be stored in a common page of memory and the common memory pages is described by a virtual block address (VBA) referencing the PBA, and each of the LBAs uses the same VBA to read the data.

Abstract translation: 将用户数据页面的用户逻辑块地址（LBA）与数据存储在RAID架构中的物理块地址（PBA）相关联的方法通过限制数据的位置来减小表的大小， 可以写入多个LBA。 来自多个LBA的数据块可以存储在存储器的共同页面中，并且通过引用PBA的虚拟块地址（VBA）来描述公共存储器页面，并且每个LBA使用相同的VBA来读取数据。

公开(公告)号：WO2014008261A1

公开(公告)日：2014-01-09

申请号：PCT/US2013/049067

申请日：2013-07-02

Applicant: VIOLIN MEMORY, INC.

Inventor： BIEDERMAN, Daniel, C. ,  BENNETT, Jon, C.R.

IPC: G06F13/14 ,  G06F12/00

CPC classification number: G06F3/0689 ,  G06F11/108

Abstract: In a memory system where memory units may be separated from each other so as to operate substantially independently, the coordination of related memory operations between such units may be by synchronization of an epoch of time and the start of an epoch of time with a common synchronization source. The source may be distributed directly to each of the memory modules of a memory unit, or through an intermediate synchronization circuit of a memory unit that is common to the modules. Where the data is stored as a RAID stripe on a plurality of synchronized modules, the read and write or erase operations performed by the modules may be arranged such that the write operations or erase operations may not substantially affect the ability to promptly read the stored data of a RAID stripe.

Abstract translation: 在存储器单元可以彼此分离以便基本上独立地操作的存储器系统中，这些单元之间的相关存储器操作的协调可以是通过同步时间的同步和时间的开始与公共同步 资源。 源可以直接分配到存储器单元的每个存储器模块，或者通过模块共有的存储器单元的中间同步电路。 在数据作为RAID条带存储在多个同步模块上的情况下，由模块执行的读取和写入或擦除操作可以被布置为使得写入操作或擦除操作可能不会基本上影响到迅速读取存储的数据的能力 的RAID条带。

公开(公告)号：WO2013176912A1

公开(公告)日：2013-11-28

申请号：PCT/US2013/040708

申请日：2013-05-13

Applicant: VIOLIN MEMORY, INC.

Inventor： PIGNATELLLI, David, G.

IPC: G11C16/06 ,  G06F13/14

CPC classification number: G06F12/0246

Abstract: An apparatus and method of managing the operation of a plurality of FLASH chips provides for a physical layer (PHY) interface to a FLASH memory circuit having a plurality of FLASH chips having a common interface bus. The apparatus has a PHY for controlling the voltages on the interface pins in accordance with a microprogrammable state machine. A data transfer in progress over the bus may be interrupted to perform another command to another chip on the shared bus and the data transfer may be resumed after completion of the another command.

Abstract translation: 管理多个FLASH芯片的操作的装置和方法提供了具有具有公共接口总线的多个FLASH芯片的闪速存储器电路的物理层（PHY）接口。 该装置具有用于根据微程序状态机控制接口引脚上的电压的PHY。 通过总线进行的数据传输可能被中断，以对共享总线上的另一个芯片执行另一个命令，并且可以在完成另一个命令之后恢复数据传输。

公开(公告)号：WO2013158817A1

公开(公告)日：2013-10-24

申请号：PCT/US2013/037062

申请日：2013-04-18

Applicant: VIOLIN MEMORY, INC.

Inventor： BENNETT, Jon, C., R.

IPC: G06F13/14 ,  G06F12/00

CPC classification number: G06F3/0619 ,  G06F3/0611 ,  G06F3/0614 ,  G06F3/0644 ,  G06F3/0656 ,  G06F3/0665 ,  G06F3/0688 ,  G06F3/0689

Abstract: A system and method is described for operating a computer memory system having a plurality of controllers capable of accessing a common set of memory modules. Access to the physical storage of the memory modules may be managed by configuration logical units (LUNs) addressable by the users. The amount of memory associated with each LUN may be managed in units of memory (LMA) from a same free LMA table maintained in each controller of the plurality of controllers. A request for maintenance of a LUN may be received from any user through any controller and results in the association of a free memory area with the LUN, and the remaining controllers perform the same operation.. A test for misallocation of a free memory area is performed and when such misallocation occurs, the situation is corrected in accordance with a policy.

Abstract translation: 描述了一种用于操作具有能够访问公共存储器模块集合的多个控制器的计算机存储器系统的系统和方法。 访问存储器模块的物理存储可以由用户寻址的配置逻辑单元（LUN）来管理。 与每个LUN相关联的存储器的量可以以存储器（LMA）为单位从与多个控制器中的每个控制器中维护的相同的自由LMA表进行管理。 可以通过任何控制器从任何用户接收到对LUN的维护请求，并导致可用内存区域与LUN的关联，其余的控制器执行相同的操作。对可用内存区域的分配错误的测试是 在发生这种不当行为时，情况根据政策进行纠正。

公开(公告)号：WO2012074916A2

公开(公告)日：2012-06-07

申请号：PCT/US2011/062215

申请日：2011-11-28

Applicant: VIOLIN MEMORY, INC. ,  OBERDORFER, Matthias

Inventor： OBERDORFER, Matthias

IPC: H04L1/16 ,  H04L12/18 ,  H04L29/06

CPC classification number: H04L12/1877

Abstract: A reliable and scalable system and method of broadcasting information to other computer nodes in a communication network requires only 0(2) time steps. According to one aspect, after broadcasting data in 0(1) steps to all nodes in the network, the system and method provides a distributed reliability protocol to ensure data delivery which only requires an additional O(l) steps. Therefore, unlike in prior art approaches where the root or co-root is responsible for the reliable data delivery, each node in the network takes on responsibility to deliver the message to a partner/neighborhood node. The broadcasting method and system of the can be used as building block for most collective/distributive operations, and provides a significant performance advantage in parallel computer systems that have multicast/broadcast capabilities.

Abstract translation: 向通信网络中的其他计算机节点广播信息的可靠且可扩展的系统和方法仅需要0（2）个时间步长。 根据一个方面，在以0（1）的步骤向网络中的所有节点广播数据之后，系统和方法提供分布式可靠性协议以确保数据传递，这仅需要额外的O（1）步骤。 因此，不同于根或共同根负责可靠数据传送的现有技术方法，网络中的每个节点承担将该消息传送到伙伴/邻居节点的责任。 该广播方法和系统可以用作大多数集合/分布式操作的构建块，并且在具有多播/广播能力的并行计算机系统中提供显着的性能优势。

公开(公告)号：WO2014004853A1

公开(公告)日：2014-01-03

申请号：PCT/US2013/048230

申请日：2013-06-27

Applicant: VIOLIN MEMORY INC.

Inventor： SISLER, John, Robert

IPC: H05K7/20 ,  H05K7/14

CPC classification number: H05K7/20 ,  G06F1/185 ,  G06F1/20 ,  H05K7/1461 ,  H05K7/1487 ,  H05K7/20127 ,  H05K7/20727

Abstract: A circuit card for a data processing system includes a printed circuit board (PCB) and a carrier. The PCB includes opposing sides parallel to a mounting direction when the PCB is installed to a cage. The carrier is attached to the PCB and includes at least one guiding member offset from a normal direction of the PCB and guiding installation of the PCB in the cage. The cage includes a plurality of support plates extending along a first direction and aligned along a second direction perpendicular to the first direction of the cage to define a plurality of air flow channels. When the circuit card is mounted to one of the support plates by engaging the guiding member to the support plate, the PCB is offset from the support plate and located right in the air flow channel without being obstructed by the support plate.

Abstract translation: 用于数据处理系统的电路卡包括印刷电路板（PCB）和载体。 当PCB安装到笼子上时，PCB包括平行于安装方向的相对侧。 载体附接到PCB，并且包括至少一个与PCB的法线方向偏移的引导构件，并将PCB的引导安装在保持架中。 保持架包括沿着第一方向延伸的多个支撑板，并且沿垂直于保持架的第一方向的第二方向对准以限定多个气流通道。 当通过将引导构件接合到支撑板将电路卡安装到一个支撑板时，PCB从支撑板偏移并且位于空气流动通道中，而不被支撑板阻碍。

公开(公告)号：WO2013158633A1

公开(公告)日：2013-10-24

申请号：PCT/US2013/036770

申请日：2013-04-16

Applicant: VIOLIN MEMORY, INC.

Inventor： BENNETT, Jon, C.R.

IPC: G06F12/00 ,  G11C16/06

CPC classification number: G06F3/065 ,  G06F3/061 ,  G06F3/0631 ,  G06F3/0679 ,  G06F11/1456 ,  G06F11/2074 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7208

Abstract: A system and method of managing the storage of data in flash memory performs snapshots of the data by maintaining the data at the epoch that the snapshot is performed in the same physical memory location. Data that is modified after the snapshot is then stored to a new physical memory location and referenced to the snapshot location. When a user read operation is performed, the data is read from the original location if the read operation is for the snapshot data. The read operation for dynamic data is performed from the original location if the data has not change since the snapshot epoch, or from the referenced data location if the data has changed since the snapshot epoch. Snapshots are released by dereferencing the original location if the data has been changed since the snapshot epoch.

Abstract translation: 管理闪速存储器中的数据的系统和方法通过在同一物理存储器位置中维护在时代执行快照的数据来执行数据的快照。 快照后修改的数据然后存储到新的物理内存位置并引用快照位置。 当执行用户读取操作时，如果读取操作用于快照数据，则从原始位置读取数据。 如果数据自快照时期以来没有变化，或者如果数据自快照时期以来发生了变化，则从原始位置执行动态数据的读取操作。 如果从快照时代以来数据已被更改，则通过取消引用原始位置来释放快照。

公开(公告)号：WO2011079298A3

公开(公告)日：2011-11-17

申请号：PCT/US2010062061

申请日：2010-12-23

Applicant: VIOLIN MEMORY INC ,  BENNETT JON C R

Inventor： BENNETT JON C R

IPC: G06F13/14

CPC classification number: G06F13/1684 ,  G06F13/14 ,  G06F13/36 ,  G11C19/00 ,  H03K19/17 ,  Y02D10/14

Abstract: An interconnection system, apparatus and method is described where the motherboard may be populated with less than all of the modules that it has been designed to accept while maintaining a configuration such that in the event of a module failure, a memory controller failure, or a combination thereof, the connectivity of the remaining modules is maintained. Where data is stored using a RAID organization of the memory on the modules, the data may be reconstructed to a spare module. The system also provides for the orderly incremental expansion of the memory by adding additional memory modules and memory controllers, while maintaining the connectivity properties.

Abstract translation: 描述了一种互连系统，装置和方法，其中母板可以被填充少于其被设计为接受的所有模块，同时保持配置，使得在模块故障，存储器控制器故障或 其组合，保持其余模块的连接性。 在使用模块上的存储器的RAID组织存储数据的情况下，可以将数据重建为备用模块。 该系统还通过添加额外的内存模块和内存控制器，同时保持连接性能，从而有序地增加内存的扩展。