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    EQUIPMENT FOR MANUFACTURING SEMICONDUCTOR FOR EPITAXIAL PROCESS
    2.
    发明申请
    EQUIPMENT FOR MANUFACTURING SEMICONDUCTOR FOR EPITAXIAL PROCESS 审中-公开
    用于外延工艺制造半导体的设备

    公开(公告)号：WO2013019063A2

    公开(公告)日：2013-02-07

    申请号：PCT/KR2012006106

    申请日：2012-07-31

    Applicant: EUGENE TECHNOLOGY CO LTD ,  KIM YOUNG-DAE ,  HYON JUN-JIN ,  WOO SANG-HO ,  SHIN SEUNG-WOO ,  KIM HAI-WON

    Inventor： KIM YOUNG-DAE ,  HYON JUN-JIN ,  WOO SANG-HO ,  SHIN SEUNG-WOO ,  KIM HAI-WON

    IPC: H01L21/20 ,  H01L21/02 ,  H01L21/302

    CPC classification number: H01L21/67017 ,  H01L21/02046 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/67051 ,  H01L21/67178 ,  H01L21/67757

    Abstract: According to one embodiment of the present invention, equipment for manufacturing a semiconductor comprises: a cleansing chamber in which a cleansing of a substrate takes place; an epitaxial chamber in which an epitaxial process of forming an epitaxial layer on the substrate takes place; and a transfer chamber, to a side of which the cleansing chamber and the epitaxial chamber are connected, comprising a substrate handler for transferring the substrate of which the cleansing process is completed to the epitaxial chamber, wherein the cleansing chamber comprises a reaction chamber, which is connected to a side of the transfer chamber and in which a reaction process with respect to the substrate takes place, and a heating chamber, which is connected to the side of the transfer chamber and in which a heating process with respect to the substrate takes place, wherein the reaction chamber and the heating chamber are loaded vertically.

    Abstract translation: 根据本发明的一个实施例，用于制造半导体的设备包括：清洗室，其中发生基板的清洁; 外延室，其中在衬底上形成外延层的外延工艺发生; 以及转移室，其清洁室和外延室的一侧被连接，包括用于将完成清洁过程的基底转移到外延室的基底处理器，其中清洁室包括反应室，其中 连接到传送室的一侧，并且其中发生相对于基板的反应过程，并且加热室连接到传送室的侧面，并且其中相对于基板的加热处理 其中反应室和加热室垂直装载。

    METHOD FOR DEPOSITING ULTRA FINE CRYSTAL PARTICLE POLYSILICON THIN FILM
    4.
    发明申请
    METHOD FOR DEPOSITING ULTRA FINE CRYSTAL PARTICLE POLYSILICON THIN FILM 审中-公开
    一种超细微晶粒多晶硅薄膜的沉积方法

    公开(公告)号：WO2009134081A3

    公开(公告)日：2010-02-11

    申请号：PCT/KR2009002267

    申请日：2009-04-29

    Applicant: EUGENE TECHNOLOGY CO LTD ,  KIM HAI WON ,  WOO SANG HO ,  CHO SUNG GIL ,  PARK SONG HWAN ,  JUNG KYUNG SOO

    Inventor： KIM HAI WON ,  WOO SANG HO ,  CHO SUNG GIL ,  PARK SONG HWAN ,  JUNG KYUNG SOO

    IPC: C23C16/24

    CPC classification number: C23C16/24

    Abstract: According to the present invention, a method for depositing an ultra-fine crystal particle polysilicon thin film supplies a source gas in a chamber loaded with a substrate to deposit a polysilicon thin film on the substrate, wherein the source gas contains a silicon-based gas, a nitrogen-based gas and a phosphorous-based gas. The mixture ratio of the nitrogen-based gas to the silicon-based gas among the source gas may be 0.03 or lower (but, excluding zero). Nitrogen in the thin film may be 11.3 atomic percent or lower (but, excluding zero).

    Abstract translation: 根据本发明，用于沉积超细晶粒多晶硅薄膜的方法在装载有衬底的室中供应源气体以在衬底上沉积多晶硅薄膜，其中源气体含有硅基气体 ，氮基气体和磷基气体。 源气体中氮基气体与硅基气体的混合比可以是0.03或更低（但不包括零）。 薄膜中的氮可以是11.3原子百分比或更低（但不包括零）。

    METHOD AND APPARATUS FOR MANUFACTURING THREE-DIMENSIONAL- STRUCTURE MEMORY DEVICE
    5.
    发明申请
    METHOD AND APPARATUS FOR MANUFACTURING THREE-DIMENSIONAL- STRUCTURE MEMORY DEVICE 审中-公开
    用于制造三维结构存储器件的方法和装置

    公开(公告)号：WO2012050321A3

    公开(公告)日：2012-07-12

    申请号：PCT/KR2011007402

    申请日：2011-10-06

    Applicant: EUGENE TECHNOLOGY CO LTD ,  CHO SUNG KIL ,  KIM HAI WON ,  WOO SANG HO ,  SHIN SEUNG WOO ,  JANG GIL SUN ,  OH WAN SUK

    Inventor： CHO SUNG KIL ,  KIM HAI WON ,  WOO SANG HO ,  SHIN SEUNG WOO ,  JANG GIL SUN ,  OH WAN SUK

    IPC: H01L21/8247 ,  H01L21/3065 ,  H01L27/115

    CPC classification number: H01L21/306 ,  C23C16/4585 ,  H01L21/02126 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/67069 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

    Abstract: A method for manufacturing a memory device having a vertical structure according to one embodiment of the present invention comprises: a step for alternatingly laminating one or more insulation layers and one or more sacrificial layers on a substrate; a step for forming a penetration hole for penetrating the insulation layer and the sacrificial layer; a step for forming a pattern for filling up the penetration hole; a step for forming an opening for penetrating the insulation layer and the sacrificial layer; and a step for removing the sacrificial layer by supplying an etchant through the opening, wherein the step for laminating the insulation layer includes a step for evaporating a first silicon oxide film by supplying to the substrate at least one gas selected from the group consisting of SiH4, Si2H6, Si3H8, and Si4H10, and the step for laminating the sacrificial layer includes a step for evaporating a second silicon oxide film by supplying dichlorosilane (SiCl2H2) to the substrate.

    Abstract translation: 根据本发明的一个实施例的用于制造具有垂直结构的存储器件的方法包括：在衬底上交替层叠一个或多个绝缘层和一个或多个牺牲层的步骤; 形成用于穿透绝缘层和牺牲层的穿透孔的步骤; 形成填充贯通孔的图案的工序; 用于形成用于穿透绝缘层和牺牲层的开口的步骤; 以及通过向所述开口供给蚀刻剂来除去所述牺牲层的步骤，其中所述层叠所述绝缘层的步骤包括通过向所述基板供给至少一种选自SiH 4的气体来蒸发第一氧化硅膜的步骤 Si2H6，Si3H8和Si4H10，层叠牺牲层的步骤包括通过向衬底提供二氯硅烷（SiCl 2 H 2）来蒸发第二氧化硅膜的步骤。

    ULTRA-FINE-GRAINED POLYSILICON THIN FILM VAPOUR-DEPOSITION METHOD
    6.
    发明申请
    ULTRA-FINE-GRAINED POLYSILICON THIN FILM VAPOUR-DEPOSITION METHOD 审中-公开
    超细晶粒多晶硅薄膜蒸发沉积法

    公开(公告)号：WO2010126237A3

    公开(公告)日：2011-02-17

    申请号：PCT/KR2010002226

    申请日：2010-04-12

    Applicant: EUGENE TECHNOLOGY CO LTD ,  KIM HAI-WON ,  WOO SANG-HO ,  CHO SUNG-GIL

    Inventor： KIM HAI-WON ,  WOO SANG-HO ,  CHO SUNG-GIL

    IPC: H01L21/205

    CPC classification number: H01L21/02532 ,  H01L21/02579 ,  H01L21/02595 ,  H01L21/0262

    Abstract: According to the present invention, an ultra-fine-grained polysilicon thin film vapour-deposition method comprises the steps of: forming a nitrogen atmosphere on the inside of a chamber in which a substrate has been loaded; and vapour-depositing a polysilicon thin film on the substrate by supplying a source gas into the chamber; the source gas comprising a silicon-based gas, a nitrogen-based gas and a phosphorous-based gas. The step of forming the nitrogen atmosphere may include the step of supplying the nitrogen-based gas into the chamber.

    Abstract translation: 根据本发明，超细晶粒多晶硅薄膜气相沉积方法包括以下步骤：在已经装载了基板的腔室的内部形成氮气氛; 以及通过将源气体供应到所述室中而在所述衬底上气相沉积多晶硅薄膜; 源气体包括硅基气体，氮气体和基于磷的气体。 形成氮气的步骤可以包括将氮基气体供应到室中的步骤。

    METHOD FOR DEPOSITING ULTRA FINE CRYSTAL PARTICLE POLYSILICON THIN FILM
    7.
    发明申请
    METHOD FOR DEPOSITING ULTRA FINE CRYSTAL PARTICLE POLYSILICON THIN FILM 审中-公开
    沉积超细晶粒多晶硅薄膜的方法

    公开(公告)号：WO2009134081A2

    公开(公告)日：2009-11-05

    申请号：PCT/KR2009002267

    申请日：2009-04-29

    Applicant: EUGENE TECHNOLOGY CO LTD ,  KIM HAI WON ,  WOO SANG HO ,  CHO SUNG GIL ,  PARK SONG HWAN ,  JUNG KYUNG SOO

    Inventor： KIM HAI WON ,  WOO SANG HO ,  CHO SUNG GIL ,  PARK SONG HWAN ,  JUNG KYUNG SOO

    IPC: C23C16/24

    CPC classification number: C23C16/24

    Abstract: According to the present invention, a method for depositing an ultra-fine crystal particle polysilicon thin film supplies a source gas in a chamber loaded with a substrate to deposit a polysilicon thin film on the substrate, wherein the source gas contains a silicon-based gas, a nitrogen-based gas and a phosphorous-based gas. The mixture ratio of the nitrogen-based gas to the silicon-based gas among the source gas may be 0.03 or lower (but, excluding zero). Nitrogen in the thin film may be 11.3 atomic percent or lower (but, excluding zero).

    Abstract translation: 根据本发明，用于沉积超细晶粒多晶硅薄膜的方法在负载有衬底的室中提供源气体，以在衬底上沉积多晶硅薄膜，其中源气体含有硅基气体 ，氮系气体和磷系气体。 源气体中的氮系气体与硅系气体的混合比可以为0.03以下（但不包括零）。 薄膜中的氮可以为11.3原子％以下（但不包括零）。

    METHOD AND APPARATUS FOR DEPOSITING THIN FILM
    8.
    发明申请
    METHOD AND APPARATUS FOR DEPOSITING THIN FILM 审中-公开
    沉积薄膜的方法和装置

    公开(公告)号：WO2009002028A3

    公开(公告)日：2009-02-19

    申请号：PCT/KR2008003234

    申请日：2008-06-11

    Applicant: EUGENE TECHNOLOGY CO LTD ,  KIM HAI-WON ,  WOO SANG-HO ,  CHO SUNG-KIL ,  LEE KEUN-HEE

    Inventor： KIM HAI-WON ,  WOO SANG-HO ,  CHO SUNG-KIL ,  LEE KEUN-HEE

    IPC: C23C16/24

    CPC classification number: C23C16/24

    Abstract: Disclosed is a method of depositing a thin film on a substrate loaded in a chamber by chemical vapor deposition (CVD). Source gas including silicon-based gas and nitrogen-based gas is supplied into a chamber. Polycrystalline silicon is deposited on the substrate by the source gas. A mixing ratio of the nitrogen-based gas to the silicon-based gas may be less than 0.05. When the mixing ratio of the nitrogen-based gas is excessive, silicon nitride (SixNy) containing a large amount of silicon is deposited on the substrate. The silicon-based gas may be silane (SiH4) or disilane (Si2H6). The nitrogen-based gas may be ammonia (NH3). According to the method, polycrystalline silicon having very fine size can be deposited and degradation of characteristics can be prevented by improving evenness of electrical characteristic.

    Abstract translation: 公开了一种通过化学气相沉积（CVD）将薄膜沉积在装载在腔室中的衬底上的方法。 包括硅基气体和氮气体的源气体被供应到室中。 多晶硅通过源气体沉积在衬底上。 氮系气体与硅系气体的混合比可以小于0.05。 当氮系气体的混合比例过大时，在基板上沉积含有大量硅的氮化硅（SixNy）。 硅基气体可以是硅烷（SiH4）或乙硅烷（Si2H6）。 氮气体可以是氨（NH 3）。 根据该方法，可以沉积具有非常细小尺寸的多晶硅，并且通过改善电特性的均匀性可以防止特性劣化。

    METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
    10.
    发明申请
    METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法

    公开(公告)号：WO2012033305A8

    公开(公告)日：2013-01-10

    申请号：PCT/KR2011006485

    申请日：2011-09-01

    Applicant: EUGENE TECHNOLOGY CO LTD ,  KIM HYE WON ,  WOO SANG HO ,  CHO SUNG KIL ,  JANG GIL SUN

    Inventor： KIM HYE WON ,  WOO SANG HO ,  CHO SUNG KIL ,  JANG GIL SUN

    IPC: H01L21/205

    CPC classification number: H01L21/02507 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/0262

    Abstract: Disclosed is a method for manufacturing a semiconductor device having a multilayer structure. The method for manufacturing a semiconductor device according to the present invention comprises the loading of a substrate into the chamber of a chemical vapor deposition apparatus and the forming of a multilayer structure in which a plurality of doped amorphous silicon layers and a plurality of insulation layers are alternately stacked. Said layers are stacked by alternately and repetitively forming the doped amorphous silicon layer on the substrate by implanting a conductive dopant and silicon precursor into the chamber where the substrate is loaded, and forming the insulation layer containing silicon on the substrate by introducing the silicon precursor and a reaction gas into the chamber where the substrate is loaded.

    Abstract translation: 公开了一种具有多层结构的半导体器件的制造方法。 根据本发明的制造半导体器件的方法包括将衬底加载到化学气相沉积设备的室中，以及形成多层结构，其中多个掺杂的非晶硅层和多个绝缘层是 交替堆叠。 所述层通过将导电掺杂剂和硅前体注入到其中负载衬底的室中而交替地和重复地形成衬底上的掺杂非晶硅层，并且通过引入硅前体和在衬底上形成含有硅的绝缘层， 将反应气体输入到载置基板的室中。

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