REMOTE PLASMA BASED DEPOSITION OF GRADED OR MULTI-LAYERED SILICON CARBIDE FILM
    2.
    发明申请
    REMOTE PLASMA BASED DEPOSITION OF GRADED OR MULTI-LAYERED SILICON CARBIDE FILM 审中-公开
    基于远程等离子体的分层或多层碳化硅膜的沉积

    公开(公告)号:WO2018063825A1

    公开(公告)日:2018-04-05

    申请号:PCT/US2017/051794

    申请日:2017-09-15

    Abstract: Provided are methods and apparatuses for depositing a graded or multi-layered silicon carbide film using remote plasma. A graded or multi-layered silicon carbide film can be formed under process conditions that provide one or more organosilicon precursors onto a substrate in a reaction chamber. Radicals of source gas in a substantially low energy state, such as radicals of hydrogen in the ground state, are provided from a remote plasma source into reaction chamber. In addition, co-reactant gas is flowed towards the reaction chamber. In some implementations, radicals of the co-reactant gas are provided from the remote plasma source into the reaction chamber. A flow rate of the co-reactant gas can be changed over time, incrementally or gradually, to form a multi-layered silicon carbide film or a graded silicon carbide film having a composition gradient from a first surface to a second surface of the graded silicon carbide film.

    Abstract translation: 提供了使用远程等离子体沉积分级或多层碳化硅膜的方法和设备。 渐变或多层碳化硅膜可以在向反应室中的基底提供一种或多种有机硅前体的工艺条件下形成。 处于基本低能量状态的源气体例如基态氢的自由基从远程等离子体源提供到反应室中。 另外,共反应气体流向反应室。 在一些实施方式中,共反应气体的自由基从远程等离子体源提供到反应室中。 共反应气体的流速可随时间递增地或逐渐地变化以形成具有从渐变硅的第一表面到第二表面的组成梯度的多层碳化硅膜或渐变碳化硅膜 碳化物薄膜。

    一种双空腔压力计芯片及其制造工艺

    公开(公告)号:WO2017215254A1

    公开(公告)日:2017-12-21

    申请号:PCT/CN2017/000359

    申请日:2017-05-16

    Abstract: 一种双空腔压力计芯片(31)以及其制造方法。一种压力计,包括腔体(33)、以及设置在腔体(33)内的压力计芯片(31);压力计芯片(31)在腔体(33)内受被检测的外界压力均匀压缩并且能够自由的产生形变。压力计芯片(31)基本由单晶硅制成,包括相互连接的盖板(3)、基板(6)及底板(7);盖板(3)上形成有凹陷部(5),并与基板(6)形成一个密封的上空腔,基板(6)与盖板(3)之间形成有氧化硅层(4);基板(6)包括压阻测量元件(23),压阻测量元件(23)位于上空腔之内;底板(7)上形成有凹陷部(5),并与基板(6)形成一个密封的下空腔。压力计芯片(31)适合测量超高压力,受温度影响较小,可以在高温的环境中使用,而且具有检测精度高、可靠性高、制造成本低等特点。

    LOW TEMP SINGLE PRECURSOR ARC HARD MASK FOR MULTILAYER PATTERNING APPLICATION
    5.
    发明申请
    LOW TEMP SINGLE PRECURSOR ARC HARD MASK FOR MULTILAYER PATTERNING APPLICATION 审中-公开
    用于多层图案应用的低温单个前体圆弧硬掩膜

    公开(公告)号:WO2017074606A1

    公开(公告)日:2017-05-04

    申请号:PCT/US2016/052636

    申请日:2016-09-20

    Abstract: Methods of single precursor deposition of hardmask and ARC layers, are described. The resultant film is a SiOC layer with higher carbon content terminated with high density silicon oxide SiO 2 layer with low carbon content. The method can include delivering a first deposition precursor to a substrate, the first deposition precursor comprising an SiOC precursor and a first flow rate of an oxygen containing gas; activating the deposition species using a plasma, whereby a SiOC containing layer over an exposed surface of the substrate is deposited. Then delivering a second precursor gas to the SiOC containing layer, the second deposition gas comprising different or same SiOC precursor with a second flow rate and a second flow rate of the oxygen containing gas and activating the deposition gas using a plasma, the second deposition gas forming a SiO 2 containing layer over the hardmask, the SiO 2 containing layer having very low carbon.

    Abstract translation: 描述了硬掩模和ARC层的单一前体沉积方法。 所得膜是具有较高碳含量的SiOC层,其以低碳含量的高密度氧化硅SiO 2层终止。 该方法可包括将第一沉积前体递送至基底,第一沉积前体包含SiOC前体和第一流速的含氧气体; 使用等离子体激活沉积物质,由此在衬底的暴露表面上沉积含有SiOC的层。 然后将第二前体气体递送至含SiOC层,第二沉积气体包含具有第二流速和第二流速的含氧气体的不同或相同SiOC前体,并使用等离子体活化沉积气体,第二沉积气体 在硬掩模上形成包含SiO 2的层,含SiO 2的层具有非常低的碳。

    UV-ASSISTED MATERIAL INJECTION INTO POROUS FILMS
    6.
    发明申请
    UV-ASSISTED MATERIAL INJECTION INTO POROUS FILMS 审中-公开
    UV辅助材料注入多孔膜

    公开(公告)号:WO2017011088A1

    公开(公告)日:2017-01-19

    申请号:PCT/US2016/035580

    申请日:2016-06-02

    Abstract: Methods are described for reducing shrinkage experienced by porous films on a patterned substrate. The film may be a silicon-and-hydrogen-containing layer which further contains one or two of carbon, oxygen and nitrogen. Shortly after deposition, the silicon-and-hydrogen-containing layer is treated by concurrent exposure to a relatively small molecule precursor (e.g. NH 3 or C 2 H 2 ) and a source of UV light. The treatment may reduce subsequent shrinkage experienced by the porous film even at the bottom of the film due to the significant penetration prior to reaction. The treatment may reduce shrinkage at the bottom of a trench filled with the porous film which provides the benefit of maintaining a greater filling factor within the trench after processing is completed.

    Abstract translation: 描述了用于减少在图案化基底上的多孔膜经历的收缩的方法。 该膜可以是还含有一个或两个碳,氧和氮的含硅和氢的层。 在沉积后不久,含硅和氢的层通过同时暴露于相对小的分子前体(例如NH 3或C 2 H 2)和UV光源来处理。 由于在反应之前的显着渗透,处理可以减少即使在膜的底部由多孔膜经历的收缩。 处理可以减少填充有多孔膜的沟槽的底部的收缩,这提供了在处理完成之后在沟槽内保持更大的填充因子的益处。

    METHOD TO REDUCE TRAP-INDUCED CAPACITANCE IN INTERCONNECT DIELECTRIC BARRIER STACK
    7.
    发明申请
    METHOD TO REDUCE TRAP-INDUCED CAPACITANCE IN INTERCONNECT DIELECTRIC BARRIER STACK 审中-公开
    减少互连电介质堆叠中的陷波电容的方法

    公开(公告)号:WO2017004075A1

    公开(公告)日:2017-01-05

    申请号:PCT/US2016/039881

    申请日:2016-06-28

    Abstract: The present disclosure provides an interconnect formed on a substrate and methods for forming the interconnect on the substrate. In one embodiment, the method for forming an interconnect on a substrate includes depositing a barrier layer on the substrate, depositing a transition layer on the barrier layer, and depositing an etch-stop layer on the transition layer, wherein the transition layer shares a common element with the barrier layer, and wherein the transition layer shares a common element with the etch-stop layer.

    Abstract translation: 本公开提供了形成在衬底上的互连和用于在衬底上形成互连的方法。 在一个实施例中,用于在衬底上形成互连的方法包括在衬底上沉积阻挡层,在阻挡层上沉积过渡层,以及在过渡层上沉积蚀刻停止层,其中过渡层共享共同 元件,并且其中所述过渡层与所述蚀刻停止层共享公共元件。

    FCVD LINE BENDING RESOLUTION BY DEPOSITION MODULATION
    9.
    发明申请
    FCVD LINE BENDING RESOLUTION BY DEPOSITION MODULATION 审中-公开
    FCVD线弯曲分辨率由沉积物调制

    公开(公告)号:WO2016105881A1

    公开(公告)日:2016-06-30

    申请号:PCT/US2015/063189

    申请日:2015-12-01

    Abstract: A method of reducing line bending and surface roughness of a substrate with pillars includes forming a treated surface by treating a pillar-containing substrate with a radical. The radical may be silicon-based, nitrogen-based or oxygen-based. The method may include forming a dielectric film over the treated surface by reacting an organosilicon precursor and an oxygen precursor. The method may include curing the dielectric film at a temperature of about 150C or less. A method of reducing line bending and surface roughness of a substrate with pillars includes forming a dielectric film over a pillar-containing substrate by reacting an organosilicon precursor, an oxygen precursor, and a radical precursor. The method may include curing the dielectric film at a temperature of about 150C or less. The radical precursor may be selected from the group consisting of nitrogen-based radical precursor, oxygen-based radical precursor, and silicon-based radical precursor.

    Abstract translation: 减少具有柱的基体的线弯曲和表面粗糙度的方法包括通过用基团处理含柱基底来形成处理表面。 该基团可以是硅基,氮基或氧基。 该方法可以包括通过使有机硅前体和氧前体反应而在处理过的表面上形成电介质膜。 该方法可以包括在约150℃或更低的温度下固化电介质膜。 减少具有柱的基板的线弯曲和表面粗糙度的方法包括通过使有机硅前体,氧前体和自由基前体反应形成在含柱底物上的电介质膜。 该方法可以包括在约150℃或更低的温度下固化电介质膜。 自由基前体可以选自氮基自由基前体,氧基自由基前体和硅基自由基前体。

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