CO-INTEGRATED BULK ACOUSTIC WAVE RESONATORS
    1.
    发明申请
    CO-INTEGRATED BULK ACOUSTIC WAVE RESONATORS 审中-公开
    共同组合的大容量声波谐波器

    公开(公告)号:WO2014210307A1

    公开(公告)日:2014-12-31

    申请号:PCT/US2014/044335

    申请日:2014-06-26

    Abstract: An electrical circuit assembly can include a semiconductor integrated circuit, such as fabricated including CMOS devices. A first lateral-mode resonator can be fabricated upon a surface of the semiconductor integrated circuit, such as including a deposited acoustic energy storage layer including a semiconductor material, a deposited piezoelectric layer acoustically coupled to the deposited acoustic energy storage layer, and a first conductive region electrically coupled to the deposited piezoelectric layer and electrically coupled to the semiconductor integrated circuit. The semiconductor integrated circuit can include one or more transistor structures, such as fabricated prior to fabrication of the lateral-mode resonator. Fabrication of the lateral-mode resonator can include low-temperature processing specified to avoid disrupting operational characteristics of the transistor structures.

    Abstract translation: 电路组件可以包括半导体集成电路,例如制造成包括CMOS器件的半导体集成电路。 可以在半导体集成电路的表面上制造第一横向模式谐振器,例如包括沉积的包含半导体材料的声能存储层,声耦合到沉积的声能存储层的沉积压电层,以及第一导电 电耦合到沉积的压电层并电耦合到半导体集成电路。 半导体集成电路可以包括一个或多个晶体管结构,例如在制造横向模式谐振器之前制造的。 横模谐振器的制造可以包括指定的低温处理以避免中断晶体管结构的操作特性。

    SYSTEMS AND METHODS FOR PROVIDING A PIPELINED ANAL OG-TO-DIGITAL CONVERTER
    2.
    发明申请
    SYSTEMS AND METHODS FOR PROVIDING A PIPELINED ANAL OG-TO-DIGITAL CONVERTER 审中-公开
    管道式数字转换器的系统和方法

    公开(公告)号:WO2012129163A2

    公开(公告)日:2012-09-27

    申请号:PCT/US2012/029654

    申请日:2012-03-19

    CPC classification number: H03M1/002 G06F1/08 H03M1/1245 H03M1/442

    Abstract: Systems comprising: a first MDAC stage comprising: a sub-ADC that outputs a value based on an input signal; at least two reference capacitors that are charged to a Vref; at least two sampling capacitors that are charged to a Vin; and a plurality of switches that couple the at least two reference capacitors so that they are charged during a sampling phase, that couple the at least two sampling capacitors so that they are charged during the sampling phase, that couple at least one of the reference capacitors so that it is parallel to one of the at least two sampling capacitors during a hold phase, and that couple the other of the at least two sampling capacitors so that it couples the at least one of the reference capacitors and the one of the at least two sampling capacitors to a reference capacitor of a second MDAC stage.

    Abstract translation: 系统包括:第一MDAC级,包括:基于输入信号输出值的子ADC; 至少两个被充电到Vref的参考电容器; 至少两个采样电容器被充电到Vin; 以及多个开关,其耦合所述至少两个参考电容器,使得它们在采样阶段被充电,所述至少两个采样电容器耦合所述至少两个采样电容器,使得它们在采样阶段期间被充电,所述至少两个采样电容器将至少一个参考电容器 使得其在保持阶段期间平行于所述至少两个采样电容器中的一个,并且耦合所述至少两个采样电容器中的另一个,使得其耦合至少一个参考电容器和至少一个采样电容器 两个采样电容器到第二MDAC级的参考电容器。

    SYSTEMS AND METHODS FOR PROVIDING POWER TO A DEVICE UNDER TEST
    3.
    发明申请
    SYSTEMS AND METHODS FOR PROVIDING POWER TO A DEVICE UNDER TEST 审中-公开
    用于向试验设备提供电源的系统和方法

    公开(公告)号:WO2009065040A1

    公开(公告)日:2009-05-22

    申请号:PCT/US2008/083642

    申请日:2008-11-14

    CPC classification number: G01R31/315 G01R31/3025

    Abstract: Systems and methods for providing power to a device under test are prcn ided. In some embodiments, systems for providing power to a device under test are provided, the systems comprising a power source for providing an alternating current, a probe having a probe inductor coupled to the power source; and a device under test having a device inductor magnetically coupled to the probe inductor, and having a circuit to be tested that receives power produced in the device inductor, In some embodiments, dev ices that receive power from a probe having an inductor that is coupled to. an alternating current power source are provided, the devices comprising: a device inductor magnetically coupled to the probe inductor; and a circuit to be tested that receives power produced in the device inductor.

    Abstract translation: 准备向被测设备供电的系统和方法。 在一些实施例中,提供了用于向受测设备提供电力的系统,所述系统包括用于提供交流电的电源,具有耦合到所述电源的探针电感器的探针; 以及被测器件具有磁耦合到探针电感器的器件电感器,并且具有接收在器件电感器中产生的功率的待测试电路。在一些实施例中,从具有耦合的电感器的探针接收功率的器件 至。 提供交流电源,所述装置包括:与所述探针电感器磁耦合的器件电感器; 以及接收在器件电感器中产生的功率的待测电路。

    CIRCUITS AND METHODS FOR IMPLEMENTING A RESIDUE AMPLIFIER
    4.
    发明申请
    CIRCUITS AND METHODS FOR IMPLEMENTING A RESIDUE AMPLIFIER 审中-公开
    用于实现残留放大器的电路和方法

    公开(公告)号:WO2012079077A1

    公开(公告)日:2012-06-14

    申请号:PCT/US2011/064414

    申请日:2011-12-12

    CPC classification number: H03M1/12 H03M1/164 H03M1/442

    Abstract: Circuits and methods for implementing a residue amplifier are provided. In some embodiments, circuits for implementing a residue amplifier are provided, the circuits comprising: a first capacitor configured to be charged to an input voltage level and that discharges from the input voltage level to a reference voltage level; a comparator having a first input coupled to the first capacitor, a second input coupled to a reference voltage source, and an output that indicates when the charge on the first capacitor is above the reference voltage level; and a second capacitor configured to be charged to an output voltage based on the output of the comparator.

    Abstract translation: 提供了实现残余放大器的电路和方法。 在一些实施例中,提供了用于实现残余放大器的电路,所述电路包括:第一电容器,被配置为被充电到输入电压电平,并且从输入电压电平放电到参考电压电平; 比较器,其具有耦合到第一电容器的第一输入端,耦合到参考电压源的第二输入端和指示第一电容器上的电荷何时高于参考电压电平的输出端; 以及第二电容器,被配置为基于比较器的输出而被充电到输出电压。

    SYSTEMS AND METHODS FOR WIRELESSLY RECEIVING DATA
    5.
    发明申请
    SYSTEMS AND METHODS FOR WIRELESSLY RECEIVING DATA 审中-公开
    无线接收数据的系统和方法

    公开(公告)号:WO2011038414A1

    公开(公告)日:2011-03-31

    申请号:PCT/US2010/050595

    申请日:2010-09-28

    CPC classification number: H04B1/7163 H04B1/7183

    Abstract: In accordance with some embodiments,, receivers for receiving a wireless data transmission are provided, the receivers comprising at least one amplifier that receives an RF input signal and produces at least one amplified signal; a mixer that mixes the at least one signal to produce a mixed signal; a filter that filters the mixed signal to produce a filtered signal, a comparator that compares the filtered signal to a threshold voltage and produces a digital signal, a first pulse generate i that generates a first pulse in response to a transition in the digital signal, a second pulse generator that generates a second pulse that is longer than the first pulse m response to a transition in the digital signal; and digital logic that generates a clock output and that generates a data output based on a state of the first pulse when the second pulse expires.

    Abstract translation: 根据一些实施例,提供了用于接收无线数据传输的接收机,所述接收机包括接收RF输入信号并产生至少一个放大信号的至少一个放大器; 混合器,其将所述至少一个信号混合以产生混合信号; 滤波器,其对混合信号进行滤波以产生经滤波的信号;比较器,其将经滤波的信号与阈值电压进行比较并产生数字信号;第一脉冲产生响应于数字信号中的转变而产生第一脉冲的i, 第二脉冲发生器,其响应于所述数字信号中的转变而产生比所述第一脉冲m长的第二脉冲; 以及产生时钟输出并且当第二脉冲期满时基于第一脉冲的状态产生数据输出的数字逻辑。

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