公开(公告)号：WO2007008790A3

公开(公告)日：2007-06-21

申请号：PCT/US2006026723

申请日：2006-07-07

Applicant: FORMFACTOR INC ,  ELDRIDGE BENJAMIN N ,  REYNOLDS CARL V ,  KAWAMATA NOBUHIRO ,  SAEKI TAKAO

Inventor： ELDRIDGE BENJAMIN N ,  REYNOLDS CARL V ,  KAWAMATA NOBUHIRO ,  SAEKI TAKAO

IPC: G01R31/02

CPC classification number: G01R31/2889 ,  G01R31/31905

Abstract: A probe card assembly includes an insert holder configured to hold a probe insert, which can include probes disposed in a particular configuration for probing a device to be tested. The probe card assembly provides an electrical interface to a tester that can control testing of the device, and while attached to the probe card assembly, the insert holder can hold the probe insert such that the probe insert is electrically connected to electrical paths within the probe card assembly that are part of the interface to the tester. The insert holder is detachable from the probe card assembly.

Abstract translation: 探针卡组件包括被构造成保持探针插入件的插入物夹持器，其可以包括设置在特定构造中的探针，用于探测待测试的装置。 探针卡组件提供到测试器的电接口，其可以控制设备的测试，并且在附接到探针卡组件时，插入物保持器可以保持探针插入件，使得探针插入件电连接到探针内的电气路径 卡组件是测试仪接口的一部分。 插入物保持器可从探针卡组件拆卸。

公开(公告)号：WO2008070590A3

公开(公告)日：2008-11-13

申请号：PCT/US2007086199

申请日：2007-11-30

Applicant: FORMFACTOR INC ,  ELDRIDGE BENJAMIN N ,  REYNOLDS CARL V ,  SAEKI TAKAO ,  URAKAWA YOICHI

Inventor： ELDRIDGE BENJAMIN N ,  REYNOLDS CARL V ,  SAEKI TAKAO ,  URAKAWA YOICHI

IPC: G01R31/02

CPC classification number: G01R1/18 ,  G01R1/07307 ,  G01R31/2889

Abstract: probing apparatus can comprise a substrate, conductive signal traces, probes, and electromagnetic shielding. The substrate can have a first surface and a second surface opposite the first surface, and the electrically conductive first signal traces can be disposed on the first surface of the first substrate. The probes can be attached to the first signal traces, and the electromagnetic shielding structures can be disposed about the signal traces.

Abstract translation: 探测装置可以包括衬底，导电信号迹线，探针和电磁屏蔽。 衬底可以具有与第一表面相对的第一表面和第二表面，并且导电的第一信号迹线可以设置在第一衬底的第一表面上。 探针可以附着到第一信号迹线上，并且电磁屏蔽结构可以围绕信号迹线设置。

公开(公告)号：WO02075783A8

公开(公告)日：2005-03-17

申请号：PCT/US0207863

申请日：2002-03-13

Applicant: FORMFACTOR INC ,  ELDRIDGE BENJAMIN N ,  REYNOLDS CARL V

Inventor： ELDRIDGE BENJAMIN N ,  REYNOLDS CARL V

IPC: G01R1/067 ,  G01R1/073 ,  H01L23/48

CPC classification number: G01R1/07378 ,  G01R1/07307 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Double-sided interposer assemblies and methods for forming and using them. In one example of the invention, an interposer (1078) comprises a substrate having a first surface (1082) and a second surface (1086) opposite of said first surface, a first plurality of contact elements (1080) disposed on said first side (1082) of said substrate, and a second plurality of contact elements (1084) disposed on said second surface (1086) of said substrate, wherein said interposer (1078) connects electronic devices (1088, 1090) via said first and said second plurality of contact elements.

Abstract translation: 双面插入器组件及其形成和使用方法。 在本发明的一个示例中，插入器（1078）包括具有第一表面（1082）和与所述第一表面相对的第二表面（1086）的基板，设置在所述第一侧面上的第一多个接触元件（1080） 1082）和设置在所述基板的所述第二表面（1086）上的第二多个接触元件（1084），其中所述插入件（1078）经由所述第一和第二多个 接触元件

公开(公告)号：WO2005055369A3

公开(公告)日：2005-11-24

申请号：PCT/US2004039394

申请日：2004-11-22

Applicant: FORMFACTOR INC ,  MATHIEU GAETAN L ,  KHANDROS IGOR K ,  REYNOLDS CARL V

Inventor： MATHIEU GAETAN L ,  KHANDROS IGOR K ,  REYNOLDS CARL V

IPC: G01R1/067 ,  G01R1/073 ,  G01R3/00 ,  H05K3/30 ,  H05K3/42 ,  H01K3/10

CPC classification number: H05K3/42 ,  G01R1/06711 ,  G01R1/07307 ,  G01R3/00 ,  H05K3/308 ,  H05K2201/09836 ,  H05K2203/0338

Abstract: Methods are provide for making vertical feed through electrical connections structure in a substrate or tile. The vertical feed through (Fig. 2, 10) can be configured to make plated through holes usable for inserting and attaching connector probes ( Fig. 2, 12). Probes may be attached to the plated through holes or attachment wells to create resilient spring contacts to form a wafer probe card assembly. A twisted tube plated through hole structure (Fig. 9D, 74) is formed by supporting twisted sacrificial wire coated with the plating material in a substrate (Fig. 9D, 79), and later etching away the wires (Fig. 9A, 74).

Abstract translation: 提供了通过基板或瓦片中的电连接结构进行垂直馈送的方法。 垂直馈送（图2,10）可以被配置为制造可用于插入和连接连接器探头的电镀通孔（图2,12）。 探针可以附着到电镀通孔或连接孔，以产生弹性弹簧触点，以形成晶片探针卡组件。 通过将涂覆有电镀材料的扭转牺牲线支撑在基板（图9D，79）中，并且随后蚀刻掉导线（图9A，74），形成通过电镀的通孔结构（图9D，74） 。

公开(公告)号：WO2009042976A2

公开(公告)日：2009-04-02

申请号：PCT/US2008078036

申请日：2008-09-26

Applicant: FORMFACTOR INC ,  HOBBS ERIC D ,  KAWAMATA NOBUHIRO ,  MCFARLAND ANDREW W ,  URAKAWA YOICHI ,  REYNOLDS CARL V

Inventor： HOBBS ERIC D ,  KAWAMATA NOBUHIRO ,  MCFARLAND ANDREW W ,  URAKAWA YOICHI ,  REYNOLDS CARL V

IPC: H01L21/66

CPC classification number: G01R31/2863 ,  G01R31/2889 ,  G01R31/31905

Abstract: Methods and apparatus for testing semiconductor devices are provided herein. In some embodiments, an assembly for testing semiconductor devices can include a probe card assembly; and a thermal barrier disposed proximate an upper surface of the probe card assembly, the thermal barrier can restrict thermal transfer between tester side boundary conditions and portions of the probe card assembly disposed beneath the thermal barrier.

Abstract translation: 本文提供了用于测试半导体器件的方法和设备。 在一些实施例中，用于测试半导体器件的组件可以包括探针卡组件; 以及设置在探针卡组件的上表面附近的热障，热障可以限制测试仪侧边界条件和布置在热障下面的探针卡组件的部分之间的热传递。

公开(公告)号：WO2004059331A3

公开(公告)日：2004-12-02

申请号：PCT/US0340316

申请日：2003-12-15

Applicant: FORMFACTOR INC

Inventor： COOPER TIMOTHY E ,  ELDRIDGE BENJAMIN N ,  REYNOLDS CARL V ,  SHENOY RAVINDRA V

IPC: G01R3/00 ,  G01R31/28 ,  G01R1/073 ,  G01R31/316

CPC classification number: G01R31/2887 ,  G01R3/00 ,  G01R31/2886

Abstract: Methods and apparatuses for testing semiconductor devices are disclosed. Over travel stops limit over travel of a device to be tested with respect to probes of a probe card assembly. Feedback control techniques are employed to control relative movement of the device and the probe card assembly. A probe card assembly includes flexible base for absorbing excessive over travel of the device to be tested with respect to the probe card assembly.

Abstract translation: 公开了用于测试半导体器件的方法和装置。 超过行程停止限制相对于探针卡组件的探头进行测试的设备的行程。 采用反馈控制技术来控制装置和探针卡组件的相对运动。 探针卡组件包括用于吸收相对于探针卡组件的待测试装置的过度行进的柔性基座。

公开(公告)号：WO2004053976A3

公开(公告)日：2004-08-05

申请号：PCT/US0338463

申请日：2003-12-02

Applicant: FORMFACTOR INC

Inventor： KHANDROS IGOR K ,  MATHIEU GAETAN L ,  REYNOLDS CARL V

IPC: G01R1/04 ,  G01R1/073 ,  G01R3/00

CPC classification number: G01R3/00 ,  G01R1/0433 ,  G01R1/0483 ,  G01R1/07378 ,  G01R31/2863 ,  H01L24/13 ,  H01L2224/131 ,  H01L2924/01046 ,  H01L2924/01055 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49149 ,  Y10T29/49169 ,  Y10T29/49179 ,  Y10T29/49197 ,  Y10T29/49204 ,  Y10T29/4921 ,  Y10T29/49211 ,  Y10T29/49224 ,  Y10T29/53217 ,  Y10T29/53265 ,  H01L2924/014

Abstract: A interconnect structure is inexpensively manufactured and easily insertable into a socket. The interconnect structure is manufactured by forming a sacrificial substrate with cavities that is covered by a masking material having openings corresponding to the cavities. A first plating process is performed by depositing conductive material, followed by coupling wires within the openings and performing another plating process by depositing more conductive material. The interconnect structure is completed by first removing the masking material and sacrificial substrate. Ends of the wires are coupled opposite now-formed contact structures to a board. To complete the socket, a support device is coupled to the board to hold a tested integrated circuit.

Abstract translation: 互连结构廉价地制造并且容易地插入到插座中。 通过形成具有由具有与空腔对应的开口的掩模材料覆盖的空腔的牺牲衬底来制造互连结构。 通过沉积导电材料，然后在开口内连接线并通过沉积更多导电材料进行另一电镀工艺来执行第一电镀工艺。 通过首先去除掩模材料和牺牲衬底来完成互连结构。 电线的端部与现在形成的接触结构相对联接到电路板。 要完成插座，支持设备耦合到电路板以保持测试的集成电路。