公开(公告)号：WO2019133868A1

公开(公告)日：2019-07-04

申请号：PCT/US2018/067951

申请日：2018-12-28

Applicant: HEADWAY TECHNOLOGIES, INC.

Inventor： ZHONG, Tom ,  HAQ, Jesmin ,  TENG, Zhongjian

IPC: H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  G11C11/16 ,  H01L27/22

Abstract: An STT-MRAM device incorporating a multiplicity of MTJ junctions is encapsulated so that it dissipates heat produced by repeated read/write processes and is simultaneously shielded from external magnetic fields of neighboring devices. In addition, the encapsulation layers can be structured to reduced top lead stresses that have been shown to affect DR/R and Hc. We provide a device design and its method of fabrication that can simultaneously address all of these problems.

公开(公告)号：WO2018186983A1

公开(公告)日：2018-10-11

申请号：PCT/US2018/021286

申请日：2018-03-07

Applicant: HEADWAY TECHNOLOGIES, INC.

Inventor： HAQ, Jesmin ,  ZHONG, Tom ,  TENG, Zhongjian ,  SHEN, Dongna

IPC: H01L43/12 ,  H01L43/08

Abstract: A method for etching a magnetic tunneling junction (MTJ) structure is described. A bottom electrode layer (12) is provided on a substrate (10). A seed layer (16) is deposited on the bottom electrode layer. The seed layer and bottom electrode layer are patterned. A dielectric layer is deposited over the patterned seed layer and bottom electrode layer and planarized wherein the seed layer is exposed. Thereafter, a stack (30) of MTJ layers is deposited on the patterned seed layer comprising a pinned layer (18), a tunnel barrier layer (20), and a free layer (22). The MTJ stack is then patterned to form a MTJ device. Because the seed layer was patterned before the MTJ patterning step, the exposure of the device to etching plasma gases is shortened and thus, etch damage is minimized.

公开(公告)号：WO2018175095A1

公开(公告)日：2018-09-27

申请号：PCT/US2018/020854

申请日：2018-03-05

Applicant: HEADWAY TECHNOLOGIES, INC.

Inventor： TENG, Zhongjian ,  ZHONG, Tom ,  HAQ, Jesmin

IPC: H01L43/12

Abstract: The proposed method for patterning a magnetic tunneling junction (MTJ) structure comprises providing a patterned mask (18) on a MTJ layer stack (16) formed over a bottom electrode (12) on a wafer (10), etching the stack to form a MTJ device, and removing sidewall damage (22) on the MTJ device by a physical treatment, preferably by using a slurry (27, 47) in a CMP or ultrasonic cleaning tool which physically attacks and removes the sidewall damage.

公开(公告)号：WO2014036101A1

公开(公告)日：2014-03-06

申请号：PCT/US2013/057018

申请日：2013-08-28

Applicant: HEADWAY TECHNOLOGIES, INC.

Inventor： HUANG, Kenlin ,  CHIN, Yuan-Tung ,  ZHONG, Tom ,  TORNG, Chyu-Jiuh

IPC: H01F10/32 ,  H01F41/30 ,  H01F41/32 ,  G01R33/09 ,  G11C11/16 ,  H01L43/12

CPC classification number: G01R33/098 ,  B82Y40/00 ,  G11C11/161 ,  H01F10/3254 ,  H01F41/308 ,  H01F41/325 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: A magnetic thin film deposition is patterned and protected from oxidation during subsequent processes, such as bit line formation, by an oxidation-prevention encapsulation layer of SiN. The SiN layer is then itself protected during the processing by a metal overlayer, preferably of Ta, Al, TiN, TaN or W. A sequence of low pressure plasma etches, using Oxygen, Cl 2 , BCl 3 and C 2 H 4 chemistries provide selectivity of the metal overlayer to various oxide layers and to the photo- resist hard masks used in patterning and metal layer and thereby allow the formation of bit lines while maintaining the integrity of the SiN layer.

Abstract translation: 通过SiN的防氧化封装层，在随后的工艺（例如位线形成）中图案化和保护磁性薄膜沉积物免于氧化。 然后，SiN层在金属覆盖层，优选Ta，Al，TiN，TaN或W的处理过程中自身受到保护。使用氧气，Cl2，BCl3和C2H4化学物质的低压等离子体蚀刻序列提供金属覆层的选择性 到各种氧化物层和用于图案化和金属层中的光致抗蚀剂硬掩模，从而允许形成位线，同时保持SiN层的完整性。

公开(公告)号：WO2019083811A1

公开(公告)日：2019-05-02

申请号：PCT/US2018/056480

申请日：2018-10-18

Applicant: HEADWAY TECHNOLOGIES, INC.

Inventor： YANG, Yi ,  WANG, Yu-Jen ,  HAQ, Jesmin ,  ZHONG, Tom

IPC: H01L43/12

Abstract: A method for etching a magnetic tunneling junction (MTJ) structure is described. A stack of MTJ layers on a bottom electrode on a wafer is provided. A metal hard mask layer is provided on the MTJ stack. A stack of multiple dielectric hard masks is formed on the metal hard mask wherein each successive dielectric hard mask has etch selectivity with respect to its underlying and overlying layers. The dielectric hard mask layers are etched in turn selectively with respect to their underlying and overlying layers wherein each successive pattern size is smaller than the preceding pattern size. The MTJ stack is etched selectively with respect to the bottommost combination dielectric and metal hard mask pattern to form a MTJ device having a MTJ pattern size smaller than a bottommost pattern size.

公开(公告)号：WO2019094577A1

公开(公告)日：2019-05-16

申请号：PCT/US2018/059802

申请日：2018-11-08

Applicant: HEADWAY TECHNOLOGIES, INC.

Inventor： HAQ, Jesmin ,  ZHONG, Tom ,  TENG, Zhongjian ,  LAM, Vinh ,  YANG, Yi

IPC: H01L43/08 ,  H01L43/12

Abstract: A layered thin film device, such as a MTJ (Magnetic Tunnel Junction) device can be customized in shape by sequentially forming its successive layers over a symmetrically curved electrode. By initially shaping the electrode to have a concave or convex surface, the sequentially formed layers conform to that shape and acquire it and are subject to stresses that cause various crystal defects to migrate away from the axis of symmetry, leaving the region immediately surrounding the axis of symmetry relatively defect free. The resulting stack can then be patterned to leave only the region that is relatively defect free.

公开(公告)号：WO2019018069A1

公开(公告)日：2019-01-24

申请号：PCT/US2018/035101

申请日：2018-05-30

Applicant: HEADWAY TECHNOLOGIES, INC.

Inventor： HAQ, Jesmin ,  ZHONG, Tom ,  TENG, Zhongjian

IPC: H01L43/08 ,  H01L43/12

Abstract: A process flow for forming a magnetic tunnel junction (MTJ) cell (47) that is self-aligned to an underlying bottom electrode BE (35, 36) is disclosed. The BE is comprised of a lower BE layer (35) having a first width (wl), and an upper (second) BE layer (36) with a second width (w2) where w2 > wl. Preferably, the BE has a T shape. A stack of MTJ layers including an uppermost hard mask (46) is deposited on the BE and has width w2 because of a self-aligned deposition process. A dummy MTJ stack (49) is also formed around the first BE layer. An ion beam etch where ions are at an incident angle