Abstract:
Some embodiments include a kit for supplying solar power in a battery-powered or fuel cell powered unmanned aerial vehicle (UAV) by incorporating flexible solar cells into a component of a UAV, affixing flexible solar cells to a surface of a UAV, or affixing flexible solar cells to a surface of a component of a UAV. The kit also includes a power conditioning system configured to operate the solar cells within a desired power range and configured to provide power having a voltage compatible with an electrical system of the UAV. Another embodiments include a solar sheet configured for installation on a surface of a UAV or on a surface of a component of a UAV. The solar sheet includes a plurality of solar cells and a polymer layer to which the plurality of solar cells are attached.
Abstract:
Methods of producing single-junction or multi-junction InP-based solar cells grown latticed-matched on a InP substrate or grown on metamorphic layers on a GaAs substrate, with the substrate subsequently removed in a nondestructive manner via the epitaxial lift-off (ELO) technique, and devices produced using the methods are described herein.
Abstract:
Some embodiments include a kit for supplying solar power in a battery-powered or fuel cell powered unmanned aerial vehicle (UAV) by incorporating flexible solar cells into a component of a UAV, affixing flexible solar cells to a surface of a UAV, or affixing flexible solar cells to a surface of a component of a UAV. The kit also includes a power conditioning system configured to operate the solar cells within a desired power range and configured to provide power having a voltage compatible with an electrical system of the UAV. Another embodiments include a solar sheet configured for installation on a surface of a UAV or on a surface of a component of a UAV. The solar sheet includes a plurality of solar cells and a polymer layer to which the plurality of solar cells are attached.
Abstract:
A heterojunction bipolar transistor is provided having an improved current gain cutoff frequency. The heterojunction bipolar transistor includes a contact region formed from InGaAsSb. The contact region allows an emitter region of the heterojunction bipolar transistor to realize a lower contact resistance value to yield an improved cutoff frequency (f T ).
Abstract:
The present invention utilizes epitaxial lift-off in which a sacrificial layer is included in the epitaxial growth between the substrate and a thin film HI-V compound solar cell. To provide support for the thin film III-V compound solar cell in absence of the substrate, a backing layer is applied to a surface of the thin film III-V compound solar cell before it is separated from the substrate. To separate the thin film III-V compound solar cell from the substrate, the sacrificial layer is removed as part of the epitaxial lift-off. Once the substrate is separated from the thin film III-V compound solar cell, the substrate may then be reused in the formation of another thin film III-V compound solar cell.
Abstract:
A heterojunction bipolar transistor is provided that has a reduced turn-on voltage threshold. A base spacer layer is provided and alternately an emitter layer is provided that has a lowered energy gap. The lowered energy gap of the base spacer or the emitter spacer allow the heterojunction bipolar transistor to realize a lower turn-on voltage threshold. The thickness of the emitter layer if utilized is kept to a minimum to reduce the associated space charge recombination current in the heterojunction bipolar transistor.
Abstract:
A method of fabricating a light emitting diode using an epitaxial lift-off process includes forming a sacrificial layer on a substrate, forming a light emitting diode structure on the sacrificial layer with an epitaxial material, forming a light reflecting layer on the light emitting diode structure, and removing the sacrificial layer using an etching process to separate the substrate from the light emitting diode structure.
Abstract:
Methods and systems for fabricating an integrated BiFET using two separate growth procedures are disclosed. Performance of the method fabricates the FET portion of the BiFET in a first fabrication environment. Performance of the method fabricates the HBT portion of the BiFET in a second fabrication environment. By separating the fabrication of the FET portion and the HBT portion in two or more separate reactors, the optimum device performance can be achieved for both devices.
Abstract:
A heterojunction bipolar transistor (10) is provided that has a reduced turn-on voltage threshold. A base spacer layer (18) is provided and alternately an emitter layer (20) is provided that has a lowered energy gap. The lowered energy gap of the base spacer or the emitter spacer allow the heterojunction bipolar transistor to realize a lower turn-on voltage threshold. The thickness of the emitter layer if utilized is kept to a minimum to reduce the associated space charge recombination current in the heterojunction bipolar transistor.
Abstract:
A heterojunction bipolar transistor is provided having an improved current gain cutoff frequency. The heterojunction bipolar transistor includes a graded base layer formed from antimony. The graded base allows the heterojunction bipolar transistor to establish a quasi-electric field to yield an improved cutoff frequency.