MEMORY BYPASS METHOD AND SYSTEM IN A COMPUTING ELEMENT IN A COMPUTATIONAL ARRAY
    1.
    发明申请
    MEMORY BYPASS METHOD AND SYSTEM IN A COMPUTING ELEMENT IN A COMPUTATIONAL ARRAY 审中-公开
    计算单元中计算单元中的记忆旁路方法和系统

    公开(公告)号:WO1997024673A1

    公开(公告)日:1997-07-10

    申请号:PCT/US1996017108

    申请日:1996-10-23

    Inventor: MOTOROLA INC.

    CPC classification number: G06F15/8015 G06F9/3824

    Abstract: A computing element (200) in a computational array includes a memory bypass system which performs in a single clock cycle a calculation that requires the result of a previous calculation performed in a previous clock cycle. The computing element has a computational unit (210) which performs calculations and a result memory (240) which stores the results of the calculations. The memory bypass method and system bypasses the result memory (240) when it determines that the result of a calculation is needed as an input to the next calculation to be performed, and provides the result of the calculation directly to the computational unit (210) to perform the next calculation. Otherwise, when the result is not needed as the input in the next calculation, the memory bypass method and system reads the input for the next calculation from the result memory (240).

    Abstract translation: 计算阵列中的计算元件(200)包括存储器旁路系统,其在单个时钟周期中执行需要在先前时钟周期中进行的先前计算的结果的计算。 计算元件具有执行计算的计算单元(210)和存储计算结果的结果存储器(240)。 当存储器旁路方法和系统确定需要计算结果作为要执行的下一个计算的输入时,绕过结果存储器(240),并将计算结果直接提供给计算单元(210) 执行下一次计算。 否则,当不需要结果作为下一次计算中的输入时,存储器旁路方法和系统从结果存储器(240)读取下次计算的输入。

    COMPUTATIONAL ARRAY AND METHOD FOR CALCULATING MULTIPLE TERMS OF A POLYNOMIAL IN A SINGLE COMPUTING ELEMENT
    2.
    发明申请
    COMPUTATIONAL ARRAY AND METHOD FOR CALCULATING MULTIPLE TERMS OF A POLYNOMIAL IN A SINGLE COMPUTING ELEMENT 审中-公开
    计算阵列和计算单​​个计算单元中多项式多项的方法

    公开(公告)号:WO1997024657A1

    公开(公告)日:1997-07-10

    申请号:PCT/US1996016982

    申请日:1996-10-23

    Inventor: MOTOROLA INC.

    CPC classification number: G06F7/552 G06F2207/5523

    Abstract: A computational array (120) includes at least one computing element (130) that calculates multiple terms in a polynomial. The computing element (130) obtains an input value of each variable in each of the multiple terms and a subscript uniquely identifying the variable. The computing element (130) reads a term identifier and an exponent corresponding to the variable at a memory location based on the subscript. The computing element (130) multiplies the input value by a selected weight value and multiplies the input value by itself a number of times based on the exponent and stores the result at a memory location corresponding to the term identifier. The computing element (130) calculates multiple terms by distinguishing each of the terms with the term identifier.

    Abstract translation: 计算阵列(120)包括计算多项式中的多个项的至少一个计算元件(130)。 计算元件(130)获得多个项中的每一个中的每个变量的输入值,以及唯一地标识该变量的下标。 计算元件(130)基于下标在存储器位置读取对应于变量的术语标识符和指数。 计算元件(130)将输入值乘以所选择的权重值,并且基于指数将输入值本身乘以多次,并将结果存储在与术语标识符相对应的存储器位置处。 计算元件(130)通过将每个术语与术语标识符区分开来计算多个术语。

    LOGARITHM/INVERSE-LOGARITHM CONVERTER UTILIZING A TRUNCATED TAYLOR SERIES AND METHOD OF USE THEREOF
    3.
    发明申请
    LOGARITHM/INVERSE-LOGARITHM CONVERTER UTILIZING A TRUNCATED TAYLOR SERIES AND METHOD OF USE THEREOF 审中-公开
    使用截止的TAYLOR系列的对数/逆对数转换器及其使用方法

    公开(公告)号:WO1996024096A1

    公开(公告)日:1996-08-08

    申请号:PCT/US1996000145

    申请日:1996-01-03

    Inventor: MOTOROLA INC.

    CPC classification number: G06F7/556 G06F1/0307 H03M7/50

    Abstract: A converter which may be used for implementing either logarithmic or inverse-logarithmic functions is disclosed. The converter includes a memory (22), two multipliers (28 and 30), and two adders (32 and 34). The memory (22) stores a plurality of coefficients which are based on a second-order Taylor polynomial used to estimate a logarithmic or inverse-logarithmic function over a domain of input values. A method of using the converter is also disclosed.

    Abstract translation: 公开了可用于实现对数或反对数函数的转换器。 转换器包括存储器(22),两个乘法器(28和30)和两个加法器(32和34)。 存储器(22)存储多个系数,其基于用于估计输入值的域上的对数或反对数函数的二阶泰勒多项式。 还公开了一种使用该转​​换器的方法。

    FLOATING POINT CONVERSION CIRCUIT
    5.
    发明申请
    FLOATING POINT CONVERSION CIRCUIT 审中-公开
    浮点转换电路

    公开(公告)号:WO1996027831A1

    公开(公告)日:1996-09-12

    申请号:PCT/US1996000730

    申请日:1996-01-22

    Inventor: MOTOROLA INC.

    CPC classification number: H03M7/24

    Abstract: A floating point conversion circuit (10) converts a fixed point data signal having a fixed point data format (200) to a floating point data signal having a floating point data format (300). The floating point conversion circuit (10) contains a twos complement circuit (110) and a programmable logic array (120) which determines the magnitude of the fixed point data signal and produces an exponent signal and a shift signal based on the magnitude determined. The floating point conversion circuit (10) also contains a barrel shifter (130) which shifts the fixed point data signal to adjust the magnitude based on the shift signal and thus produces a signal. The floating point conversion circuit (10) outputs a floating point data signal having a floating point exponent portion (320) represented by the exponent signal and a floating point portion (330) represented by the signal.

    Abstract translation: 浮点转换电路(10)将具有固定点数据格式(200)的固定点数据信号转换成具有浮点数据格式(300)的浮点数据信号。 浮点转换电路(10)包含二进制补码电路(110)和可编程逻辑阵列(120),可编程逻辑阵列(120)确定固定点数据信号的大小,并根据确定的幅度产生指数信号和移位信号。 浮点转换电路(10)还包括桶形移位器(130),其移动固定点数据信号以根据移位信号调整幅度,从而产生信号。 浮点转换电路(10)输出具有由指数信号表示的浮点指数部分(320)和由该信号表示的浮点部分(330)的浮点数据信号。

    EXPONENTIATION CIRCUIT UTILIZING SHIFT MEANS AND METHOD OF USING SAME
    6.
    发明申请
    EXPONENTIATION CIRCUIT UTILIZING SHIFT MEANS AND METHOD OF USING SAME 审中-公开
    使用移位手段的授权电路及其使用方法

    公开(公告)号:WO1996028774A1

    公开(公告)日:1996-09-19

    申请号:PCT/US1996000955

    申请日:1996-01-29

    Inventor: MOTOROLA INC.

    CPC classification number: G06F7/556

    Abstract: A circuit and method for computing an exponential signal x is provided. The circuit includes a logarithm converter (4) which converts an input signal to binary word that represents the logarithm of an input signal x. A first shift register shifts (8) the binary word in a bit-wise fashion to produce a first intermediate value; while a second shift register (28) shifts the binary word in a bit-wise fashion to produce a second intermediate value. The shift registers may be implemented using multiplexers. The shifting operations are equivalent to multiplying the intermediate values by a factor which is a power of two. The first intermediate value is either added to or subtracted from the second intermediate value to produce a combined value. An inverse-logarithm converter (34) converts the combined value to the exponential signal.

    Abstract translation: 提供了一种用于计算指数信号x 的电路和方法。 电路包括将输入信号转换为表示输入信号x的对数的二进制字的对数转换器(4)。 第一移位寄存器以逐位方式移位(8)二进制字以产生第一中间值; 而第二移位寄存器(28)以逐位方式移位二进制字以产生第二中间值。 移位寄存器可以使用多路复用器来实现。 换档操作等效于将中间值乘以2的幂。 将第一中间值添加到第二中间值或从第二中间值中减去以产生组合值。 逆对数转换器(34)将组合值转换为指数信号。

    METHOD FOR MONITORING THE PERFORMANCE OF A CATALYTIC CONVERTER
    7.
    发明申请
    METHOD FOR MONITORING THE PERFORMANCE OF A CATALYTIC CONVERTER 审中-公开
    监测催化转化器性能的方法

    公开(公告)号:WO1998038415A1

    公开(公告)日:1998-09-03

    申请号:PCT/US1997022634

    申请日:1997-12-04

    Applicant: MOTOROLA INC.

    Abstract: A method for monitoring the performance of a catalytic converter (34) computes the oxygen storage capacity and desorption capacity of a catalyst within the catalytic converter (34). An engine control unit (10) receives mass flow rate information of air from a mass air flow rate sensor (12) and an injector driver (24), and receives electrical signals from an upstream exhaust gas sensor (28) and a downstream exhaust gas sensor (30). The engine control unit (10) calculates normalized air fuel ratios for the exhaust gas entering and leaving the catalytic converter (34) and performs numerical integration to determine the oxygen storage capacity and oxygen desorption capacity of the catalyst in the catalytic converter (34). The calculated oxygen storage and desorption capacities of the catalyst are compared with threshold values to determine the performance of the catalytic converter (34).

    Abstract translation: 用于监测催化转化器(34)的性能的方法计算催化转化器(34)内的催化剂的储氧能力和解吸能力。 发动机控制单元(10)从质量空气流量传感器(12)和喷射器驱动器(24)接收空气的质量流量信息,并且从上游废气传感器(28)和下游排气 传感器(30)。 发动机控制单元(10)计算进入和离开催化转化器(34)的废气的归一化空燃比,并执行数值积分,以确定催化转化器(34)中的催化剂的储氧能力和氧解吸能力。 将催化剂的计算氧气存储和解吸能力与阈值进行比较以确定催化转化器(34)的性能。

    LOW CURRENT DRAIN SWITCH INTERFACE CIRCUIT
    8.
    发明申请
    LOW CURRENT DRAIN SWITCH INTERFACE CIRCUIT 审中-公开
    低电流漏极开关接口电路

    公开(公告)号:WO1998032226A1

    公开(公告)日:1998-07-23

    申请号:PCT/US1997022922

    申请日:1997-12-12

    Applicant: MOTOROLA INC.

    CPC classification number: H01H9/167 H03K17/18

    Abstract: A low current drain switch interface circuit includes an input terminal (105), coupled to a first terminal (201) of a diode (204). A voltage follower circuit (211) is coupled to a second terminal (203) of the diode (204). A current source (215) is coupled between an output terminal (213) of the voltage follower circuit (211) and a power supply terminal (111). A mechanical switch (101) is coupled to the input terminal (105). The voltage follower circuit (211) outputs a voltage (119) indicative of a physical state of the mechanical switch (101).

    Abstract translation: 低电流漏极开关接口电路包括耦合到二极管(204)的第一端子(201)的输入端子(105)。 电压跟随器电路(211)耦合到二极管(204)的第二端子(203)。 电流源(215)耦合在电压跟随器电路(211)的输出端子(213)和电源端子(111)之间。 机械开关(101)耦合到输入端(105)。 电压跟随器电路(211)输出表示机械开关(101)的物理状态的电压(119)。

    CHANNEL MONITORING BY A MULTICHANNEL SELECTIVE CALL RECEIVER
    9.
    发明申请
    CHANNEL MONITORING BY A MULTICHANNEL SELECTIVE CALL RECEIVER 审中-公开
    多通道选择性呼叫接收机的通道监控

    公开(公告)号:WO1998031166A1

    公开(公告)日:1998-07-16

    申请号:PCT/SG1997000073

    申请日:1997-12-17

    Inventor: MOTOROLA INC.

    CPC classification number: H04W88/022

    Abstract: A multichannel selective call receiver (10) with a receiver (11), a controller (16), a baud detector (17) and a memory (18). Controller (16) is adapted to control receiver (11) in receiving information on a channel (14). The information on channel (14) includes mandatory frames having information fields. If the information fields in a mandatory frame on channel (14) does not indicate more information for multichannel selective call receiver (10) in the rest of the mandatory frame, then controller (16) controls receiver (11) to receive information on other channels (15) during the rest of the mandatory frame. The information on channel (14) and other channels (15) are processed in accordance with channel pririty as indicated in a channel list stored in memory (18).

    Abstract translation: 具有接收器(11),控制器(16),波特率检测器(17)和存储器(18)的多通道选呼接收器(10)。 控制器(16)适于控制接收机(11)接收信道(14)上的信息。 信道(14)上的信息包括具有信息字段的强制帧。 如果信道(14)中的强制帧中的信息字段在强制帧的其余部分中没有指示多信道选呼接收机(10)的更多信息,则控制器(16)控制接收机(11)接收其他信道上的信息 (15)在其余的强制性框架。 根据存储在存储器(18)中的频道列表中所指示的频道精度来处理关于频道(14)和其他频道(15)的信息。

    METHOD OF ASSIGNING A DEVICE IDENTIFICATION
    10.
    发明申请
    METHOD OF ASSIGNING A DEVICE IDENTIFICATION 审中-公开
    识别设备识别的方法

    公开(公告)号:WO1998031118A1

    公开(公告)日:1998-07-16

    申请号:PCT/US1997022911

    申请日:1997-12-12

    Applicant: MOTOROLA INC.

    Abstract: The present invention provides a method of assigning a unique device identification to an electronic device (28, 30, 32, 34) coupled into a communication architecture. Once coupled into the communication architecture a piece of globally unique identifying data is retrieved and utilized to generate a device identification which identification is then assigned to the device (28, 30, 32, 34).

    Abstract translation: 本发明提供了一种将独特的设备标识分配给耦合到通信架构中的电子设备(28,30,32,34)的方法。 一旦耦合到通信架构中,检索并利用一块全球唯一的识别数据来产生设备标识,该标识然后被分配给设备(28,30,32,34)。

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