公开(公告)号：WO2013036394A3

公开(公告)日：2013-03-14

申请号：PCT/US2012/052524

申请日：2012-08-27

Applicant: QUALCOMM MEMS TECHNOLOGIES, INC. ,  STEPHANOU, Philip Jason ,  LONDERGAN, Ana Rangelova ,  GOUSEV, Evgeni Petrovich ,  SHENOY, Ravindra Vaman

Inventor： STEPHANOU, Philip Jason ,  LONDERGAN, Ana Rangelova ,  GOUSEV, Evgeni Petrovich ,  SHENOY, Ravindra Vaman

IPC: B81C1/00 ,  C25D5/10 ,  C25D5/18 ,  C23C28/02

Abstract: This disclosure provides implementations of high surface area stacked layered metallic structures, devices, apparatus, systems, and related methods. A plurality of stacked layers on a substrate may be manufactured from a plating bath including a first metal and a second metal. A modulated plating current can deposit alternate first metal layers and alloy layers, the alloy layers including the first metal and the second metal. Gaps between the alloy layers can be formed by selectively etching some portions of the first metal layers to define a stacked layered structure. Stacked layered structures may be useful in applications to form capacitors, inductors, catalytic reactors, heat transfer tubes, non-linear springs, filters, batteries, and heavy metal purifiers.

公开(公告)号：WO2015047660A1

公开(公告)日：2015-04-02

申请号：PCT/US2014/053458

申请日：2014-08-29

Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.

Inventor： SHENOY, Ravindra Vaman ,  LAI, Kwan-yu ,  LASITER, Jon Bradley ,  STEPHANOU, Philip Jason ,  KIDWELL, Donald William Jr. ,  GOUSEV, Evgeni P.

IPC: H01L25/18 ,  H01L25/10 ,  H01L23/15 ,  H01L23/498

CPC classification number: H01L23/481 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5381 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L27/108 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor device comprising a second surface of a logic die and a second surface of a via bar coupled to a first surface of a substrate, a second surface of a memory die coupled to a first surface of the via bar, a portion of the second surface of the memory die extending over the first surface of the logic die, such that the logic die and the memory die are vertically staggered, and the memory die electrically coupled to the logic die through the via bar. The via bar can be formed from glass, and include through-glass vias (TGVs) and embedded passives such as resistors, capacitors, and inductors. The semiconductor device can be formed as a single package or a package-on-package structure with the via bar and the memory die encapsulated in a package and the substrate and logic die in another package.

Abstract translation: 一种半导体器件，包括逻辑管芯的第二表面和耦合到衬底的第一表面的通孔条的第二表面，耦合到通孔条的第一表面的存储器管芯的第二表面，第二部分的一部分 存储芯片的表面在逻辑管芯的第一表面上延伸，使得逻辑管芯和存储器管芯垂直交错，并且存储器管芯通过通孔电连接到逻辑管芯。 通孔棒可以由玻璃形成，并且包括透玻璃通孔（TGV）和嵌入式无源器件，例如电阻器，电容器和电感器。 半导体器件可以形成为单个封装或封装封装结构，其中通孔条和存储管芯封装在封装中，并且衬底和逻辑裸片在另一封装中。

公开(公告)号：WO2015020871A1

公开(公告)日：2015-02-12

申请号：PCT/US2014/049103

申请日：2014-07-31

Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.

Inventor： STEPHANOU, Philip Jason ,  KIM, Jitae ,  SHENOY, Ravindra Vaman ,  LAI, Kwan-Yu

IPC: H01F17/00 ,  H01F41/04

CPC classification number: H01F27/2804 ,  H01F17/0033 ,  H01F27/24 ,  H01F41/041 ,  H01F41/046 ,  H01F2017/004 ,  H01F2017/0066 ,  H01F2027/2809

Abstract: A particular device includes a coil and a discontinuous magnetic core. The discontinuous magnetic core includes a first elongated portion, a second elongated portion, and at least two curved portions, where the portions are coplanar and physically separated from each other. The discontinuous magnetic core is arranged to form a discontinuous loop. The discontinuous magnetic core is deposited as a first layer above a dielectric substrate. A first portion of the coil extends above a first surface of the magnetic core. A second portion of the coil extends below a second surface of the magnetic core. The second portion of the coil is electrically coupled to the first portion of the coil. The second surface of the magnetic core is opposite the first surface of the magnetic core.

Abstract translation: 特定装置包括线圈和不连续磁芯。 不连续磁芯包括第一细长部分，第二细长部分和至少两个弯曲部分，其中部分是共面的并且物理上彼此分离。 非连续磁芯被布置成形成不连续的环路。 不连续磁芯作为电介质基片上的第一层沉积。 线圈的第一部分在磁芯的第一表面上方延伸。 线圈的第二部分在磁芯的第二表面的下方延伸。 线圈的第二部分电耦合到线圈的第一部分。 磁芯的第二表面与磁芯的第一表面相对。