Abstract:
The game console system includes a user interface module and a graphics processing module that are remotely situated from one another and solely coupled to one another via one or more communication links. The graphics processing module is positioned within a controlled environment chamber that thermally and acoustically isolates the user interface module from the graphics processing module. The user interface module includes a controller and a console coupled to the controller. The console also is configured to be coupled to a display.
Abstract:
A system and method for inductively heating a work piece. The induction heating system is coupleable to a plurality of temperature feedback devices operable to provide a signal representative of work piece temperature. The induction heating system is operable to control the output of the induction heating system based on the plurality of signals representative of work piece temperature received from the plurality of temperature feedback devices.
Abstract:
A memory system includes nonvolatile physical memory, such as flash memory, that exhibits a wear mechanism asymmetrically associated with write operations. A relatively small cache of volatile memory reduces the number of writes, and wear-leveling memory access methods distribute writes evenly over the nonvolatile memory.
Abstract:
Disclosed herein are embodiments of an asynchronous memory device that use internal delay elements to enable memory access pipelining. In one embodiment, the delay elements are responsive to an input load control signal, and are calibrated with reference to periodically received timing pulses. Different numbers of the delay elements are configured to produce different synchronous delays and to strobe sequential pipeline elements of the memory device.
Abstract:
A memory system configured to provide thermal regulation of a plurality of memory devices is disclosed. The memory system comprises a memory device coupled to a bus. Additionally, the memory system also comprises a controller coupled to the bus. The controller determines an operating temperature of the memory device. Based on the operating temperature of the memory device, the controller is further operable to manipulate the operation of the memory system.
Abstract:
A memory device has interface circuitry and a memory core which make up the stages of a pipeline, each stage being a step in a universal sequence associated with the memory core. The memory device has a plurality of operation units such as precharge, sense, read and write, which handle the primitive operations of the memory core to which the operation units are coupled. The memory device further includes a plurality of transport units configured to obtain information from external connections specifying an operation for one of the operation units and to transfer data between the memory core and the external connections. The transport units operate concurrently with the operation units as added stages to the pipeline, thereby creating a memory device which operates at high throughput and with low service times under the memory reference stream of common applications.