公开(公告)号：WO2009046306A1

公开(公告)日：2009-04-09

申请号：PCT/US2008/078760

申请日：2008-10-03

申请人： SILICON GENESIS CORPORATION ,  HENLEY, Francois, J. ,  LAAM, Albert ,  BRAILOVE, Adam ,  ADIBI, Babak

发明人： HENLEY, Francois, J. ,  LAAM, Albert ,  BRAILOVE, Adam ,  ADIBI, Babak

IPC分类号： H01J37/08

CPC分类号： H01J37/3171 ,  H01J2237/022 ,  H01J2237/04735 ,  H01J2237/057 ,  H01J2237/18 ,  H01J2237/31705 ,  H01L21/76254

摘要： A system of introducing a particle beam such as a linear accelerator particle beam for low contaminate processing. The system includes an accelerator apparatus configured to generate a first particle beam including at least a first ionic specie in an energy level 1 MeV to 5 MeV or greater. Additionally, the system includes a beam filter coupled to the linear accelerator apparatus to receive the first particle beam. The beam filter is in a first chamber and configured to generate a second particle beam with substantially the first ionic specie only. The first chamber is associated with a first pressure. The system further includes an end-station including a second chamber coupled to the first chamber for extracting the second particle beam. The second particle beam is irradiated onto a planar surface of a bulk workpiece loaded in the second chamber for implanting the first ionic specie.

摘要翻译： 引入粒子束的系统，例如用于低污染处理的线性加速器粒子束。 该系统包括加速器装置，该加速器装置被配置为产生第一粒子束，该第一粒子束至少包括能量级MeV至5MeV或更大的第一离子物质。 另外，该系统包括耦合到线性加速器装置以接收第一粒子束的束过滤器。 束过滤器位于第一室中，并且被配置为仅产生基本上为第一离子物质的第二粒子束。 第一室与第一压力相关。 该系统还包括终端站，其包括耦合到第一室的第二室，用于提取第二粒子束。 将第二粒子束照射到装载在第二室中的体积工件的平坦表面上，用于植入第一离子物质。

公开(公告)号：WO2007114974A2

公开(公告)日：2007-10-11

申请号：PCT/US2007/060801

申请日：2007-01-19

申请人： SILICON GENESIS CORPORATION ,  HENLEY, Francois, J. ,  SULLIVAN, James, Andrew ,  KANG, Sien, Giok ,  ONG, Philip, James ,  KIRK, Harry, Robert ,  JACY, David

发明人： HENLEY, Francois, J. ,  SULLIVAN, James, Andrew ,  KANG, Sien, Giok ,  ONG, Philip, James ,  KIRK, Harry, Robert ,  JACY, David

IPC分类号： G06Q10/00 ,  G06Q40/00

CPC分类号： H01L21/76254

摘要： A method for fabricating bonded substrate structures, e.g., silicon on silicon. In a specific embodiment, the method includes providing a thickness of single crystal silicon material transferred from a first silicon substrate coupled to a second silicon substrate. In a specific embodiment, the second silicon substrate has a second surface region that is joined to a first surface region from the thickness of single crystal silicon material to form of an interface region having a first characteristic including a silicon oxide material between the thickness of single crystal silicon material and the second silicon substrate. The method includes subjecting the interface region to a thermal process to cause a change to the interface region from the first characteristic to a second characteristic. In a specific embodiment, the second characteristic is free from the silicon oxide material and is an epitaxially formed silicon material provided between the thickness of single crystal silicon material and the second silicon substrate. The method includes maintaining the interface region free of multiple voids during the thermal process to form the epitaxially formed silicon material to electrically couple the thickness of single crystal silicon material to the second silicon substrate.

摘要翻译： 一种制造键合衬底结构的方法，例如硅上的硅。 在具体实施例中，该方法包括提供从耦合到第二硅衬底的第一硅衬底转移的单晶硅材料的厚度。 在具体实施例中，第二硅衬底具有第二表面区域，该第二表面区域从单晶硅材料的厚度连接到第一表面区域，以形成具有第一特征的界面区域，该第一特征包括单一厚度的氧化硅材料 晶体硅材料和第二硅衬底。 该方法包括使界面区域进行热处理以使接口区域从第一特性改变到第二特性。 在具体实施方案中，第二特性不含氧化硅材料，并且是设置在单晶硅材料的厚度与第二硅衬底之间的外延形成的硅材料。 该方法包括在热处理期间保持界面区域没有多个空隙以形成外延形成的硅材料，以将单晶硅材料的厚度电耦合到第二硅衬底。

公开(公告)号：WO2008088560A2

公开(公告)日：2008-07-24

申请号：PCT/US2007/060802

申请日：2007-01-19

申请人： SILICON GENESIS CORPORATION ,  LAMM, Albert ,  MERTEN, Cynthia ,  HENLEY, Francois, J. ,  ONG, Philip, James ,  GARCES, Eugenio ,  PHAM, Viet ,  PALER, Anthony

发明人： LAMM, Albert ,  MERTEN, Cynthia ,  HENLEY, Francois, J. ,  ONG, Philip, James ,  GARCES, Eugenio ,  PHAM, Viet ,  PALER, Anthony

IPC分类号： B26F3/00

CPC分类号： B28D5/0064 ,  B28D5/00 ,  H01L21/76251

摘要： A method and apparatus for cleaving bonded substrates utilizes tensile force applied to the bonded substrates from an arm, in combination with a blade to initiate local cleaving. Upon sensing a drop in the load on the arm following initiation of the local cleaving, movement of the arm by a motor is carefully controlled to reduce the load, such that a speed of subsequent global cleaving substantially matches the speed of the initial local cleaving. A tool for performing this cleaving may include a suction member configured to secure a first bonded substrate to a base, an arm having a first end configured to pivot about the base, and a second end having a suction member configured to contact the second bonded substrate. A motor applies force to the arm that is translated into tensile force applied across the bonded wafer pair. The motor is configured to move the arm in a carefully controlled manner to reduce the applied tensile force once cleaving has been initiated with a blade.

摘要翻译： 用于切割粘合的基底的方法和装置利用与臂结合施加到粘合的基底上的张力，与叶片组合以引发局部裂开。 一旦检测到局部劈裂开始之后臂上的负载下降，则仔细地控制由电动机进行的臂的移动以减小负载，使得随后的全局劈裂的速度基本上与初始局部劈裂的速度相匹配。 用于执行该切割的工具可以包括构造成将第一键合衬底固定到基座的抽吸构件，具有构造成围绕基部枢转的第一端的臂，以及具有构造成接触第二键合衬底的抽吸构件的第二端 。 电动机对臂施加力，该力被转化为跨接合的晶片对施加的张力。 电动机被配置成以小心地控制的方式移动臂，以便一旦用刀片开始劈开就减少施加的张力。

公开(公告)号：WO2008014339A2

公开(公告)日：2008-01-31

申请号：PCT/US2007/074352

申请日：2007-07-25

申请人： SILICON GENESIS CORPORATION ,  HENLEY, Francois, J.

发明人： HENLEY, Francois, J.

IPC分类号： H01L21/425 ,  H01L21/677

CPC分类号： H01L21/67754 ,  H01J37/185 ,  H01J37/20 ,  H01J37/3171 ,  H01J37/32412 ,  H01J2237/184 ,  H01J2237/30 ,  H01J2237/31 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

摘要： A method for manufacturing doped substrates using a continuous large area scanning implantation process is disclosed. In one embodiment, the method includes providing a movable track member. The movable track member is provided in a chamber. The chamber includes an inlet and an outlet. In a specific embodiment, the movable track member can include one or more rollers, air bearings, belt member, and/or movable beam member to provide one or more substrates for a scanning process. The method may also include providing a first substrate. The first substrate includes a first plurality of tiles. The method maintains the first substrate including the first plurality of tiles in a vacuum. The method includes transferring the first substrate including the first plurality of tiles from the inlet port onto the movable track member. The first plurality of tiles are subjected to a scanning implant process. The method also includes maintaining a second substrate including a second plurality of tiles in the vacuum. The method includes transferring the second substrate including a second plurality of tiles from the inlet port onto the movable track member. The method includes subjecting the second plurality of tiles to an implant process using the scanning implant process.

摘要翻译： 公开了一种使用连续大面积扫描注入工艺制造掺杂衬底的方法。 在一个实施例中，该方法包括提供可移动轨道构件。 可移动轨道构件设置在腔室中。 该室包括入口和出口。 在具体实施例中，可移动轨道构件可以包括一个或多个辊，空气轴承，带构件和/或可移动梁构件，以提供用于扫描过程的一个或多个基板。 该方法还可以包括提供第一衬底。 第一基板包括第一多个瓦片。 该方法在真空中保持包括第一多个瓦片的第一基板。 该方法包括将包括第一多个瓦片的第一基底从入口转移到可移动轨道构件上。 对第一多个瓷砖进行扫描注入工艺。 该方法还包括在真空中维持包括第二多个瓦片的第二基板。 该方法包括将包括第二多个瓦片的第二基板从入口传送到可移动轨道构件上。 该方法包括使用扫描注入工艺对第二多个瓷砖进行植入工艺。

公开(公告)号：WO2007047536A3

公开(公告)日：2007-04-26

申请号：PCT/US2006/040271

申请日：2006-10-13

申请人： SILICON GENESIS CORPORATION ,  KIRK, Harry, R. ,  HENLEY, Francois, J. ,  ONG, Philip, James

发明人： KIRK, Harry, R. ,  HENLEY, Francois, J. ,  ONG, Philip, James

IPC分类号： H01L21/30

摘要： Embodiments in accordance with the present invention relate to methods and apparatuses for bonding together substrates (602/604) in a manner that suppresses the formation of voids between them In a specific embodiment, a backside of each substrate (602/604) is adhered to a front area of flexible, porous chuck (606/608) having a rear area in pneumatic communication with a vacuum Application of the vacuum causes the chuck (606/608) and the associated substrate (602, 604) to slightly bend Owing to this bending, physical contact between local portions on the front side of th flexed substrates may be initiated, while maintaining other portions on front side of the substrates substantially free from contact with each other A bond wave is formed and maintained at a determined velocity to form a continuous interface joining the front sides of the substrates, without formation of voids therebetween In one embodiment, the chucks (606/608) may comprise porous polyethylene sealed with polyimide except for a portion of the front configured to be in contact with the substrate, and a portion of the backside configured to be in communication with a vacuum source (614).

公开(公告)号：WO2005050711A3

公开(公告)日：2005-06-02

申请号：PCT/US2004/038616

申请日：2004-11-18

申请人： SILICON GENESIS CORPORATION ,  HENLEY, Francois, J.

发明人： HENLEY, Francois, J.

IPC分类号： H01L21/44 ,  H01L21/8238

摘要： A method of manufacturing an integrated circuit on semiconductor substrates. The method includes providing a semiconductor substrate characterized by a first lattice with a first structure and a first spacing. The semiconductor substrate has an overlying film of material with a second lattice with a second structure and a second spacing. Preferably, the second spacing placing the film of material in either a tensile or compressive mode across the entirety of the film of material relative to the semiconductor substrate with the first structure and the first spacing. The method includes processing the film of material to form a first region and a second region within the film of material. The first region and the second region are characterized by either the tensile or compressive mode. Preferably, both the first and second regions in their entirety are characterized by either the tensile or compressive mode. The method includes processing the first region of the film of material while maintaining the second region characterized by either the tensile or the compressive mode to form an opposite characteristic from the second region. The opposite characteristic is a tensile mode if the second region is in the compressive mode and the opposite characteristic is the compressive mode if the second region is in the tensile mode.

公开(公告)号：WO2008058131A2

公开(公告)日：2008-05-15

申请号：PCT/US2007/083784

申请日：2007-11-06

申请人： SILICON GENESIS CORPORATION ,  HENLEY, Francois, J. ,  LAMM, Albert ,  ADIBI, Babak

发明人： HENLEY, Francois, J. ,  LAMM, Albert ,  ADIBI, Babak

IPC分类号： H01L21/20

CPC分类号： H01L21/76254 ,  H01L21/26506 ,  H01L21/3221

摘要： A method for fabricating free standing thickness of materials using one or more semiconductor substrates, e.g., single crystal silicon, polysilicon, silicon germanium, germanium, group III/IV materials, and others. In a specific embodiment, the present method includes providing a semiconductor substrate having a surface region and a thickness. The method includes subjecting the surface region of the semiconductor substrate to a first plurality of high energy particles generated using a linear accelerator to form a region of a plurality of gettering sites within a cleave region, the cleave region being provided beneath the surface region to defined a thickness of material to be detached, the semiconductor substrate being maintained at a first temperature. In a specific embodiment, the method includes subjecting the surface region of the semiconductor substrate to a second plurality of high energy particles generated using the linear accelerator, the second plurality of high energy particles being provided to increase a stress level of the cleave region from a first stress level to a second stress level. In a preferred embodiment, the semiconductor substrate is maintained at a second temperature, which is higher than the first temperature. The method frees the thickness of detachable material using a cleaving process, e.g., controlled cleaving process.

摘要翻译： 利用一个或多个半导体衬底（例如，单晶硅，多晶硅，硅锗，锗，III / IV族材料等）制造材料的独立厚度的方法。 在具体实施例中，本方法包括提供具有表面区域和厚度的半导体衬底。 该方法包括使半导体衬底的表面区域经受使用线性加速器产生的第一多个高能粒子以在劈裂区域内形成多个吸杂位置的区域，劈裂区域设置在表面区域的下方以限定 待分离材料的厚度，半导体衬底保持在第一温度。 在特定实施例中，该方法包括使半导体衬底的表面区域经受使用线性加速器产生的第二多个高能粒子，提供第二多个高能粒子以增加劈裂区域的应力水平从 第一应力水平至第二应力水平。 在优选实施例中，半导体衬底保持在高于第一温度的第二温度。 该方法使用切割工艺（例如受控切割工艺）释放可分离材料的厚度。

公开(公告)号：WO2007118121A3

公开(公告)日：2007-10-18

申请号：PCT/US2007/065964

申请日：2007-04-04

申请人： SILICON GENESIS CORPORATION ,  HENLEY, Francois, J.

发明人： HENLEY, Francois, J.

IPC分类号： H01L21/00 ,  H01L25/00 ,  H01L31/00 ,  H02N6/00

摘要： A reusable silicon substrate device for use with layer transfer process. The device has a reusable substrate having a surface region, a cleave region, and a total thickness of material. The total thickness of material is at least N times greater than a first thickness of material to be removed. In a specific embodiment, the first thickness of material to be removed is between the surface region and the cleave region, whereupon N is an integer greater than about ten. The device also has a chuck member adapted to hold a handle substrate member in place. The chuck member is configured to hold the handle substrate in a manner to facilitate bonding the handle substrate to the first thickness of material to be removed. In a preferred embodiment, the device has a mechanical pressure device operably coupled to the chuck member. The mechanical pressure device is adapted to provide a force to cause bonding of the handle substrate to the first thickness of material to be removed.

公开(公告)号：WO2007019544A3

公开(公告)日：2007-02-15

申请号：PCT/US2006/031033

申请日：2006-08-08

申请人： SILICON GENESIS CORPORATION ,  HENLEY, Francois, J.

发明人： HENLEY, Francois, J.

IPC分类号： B29C63/00 ,  H01L27/00 ,  H01L21/46

摘要： A method for fabricating one or more devices, e.g., integrated circuits. The method includes providing a multi-layered substrate, which has a thickness of material (e.g., single crystal silicon) overlying a first debondable surface coupled to and overlying a second debondable surface. The second debondable surface is overlying an interface region of the multi-layered substrate. In a preferred embodiment, the thickness of material having a surface region. The method includes processing the surface region of the multi-layered substrate using one or more processes to form at least one device onto a portion of the surface region. The method includes forming a planarized upper surface region overlying the surface region of the thickness of material. The method includes joining the planarized upper surface region to a face of a handle substrate. In a preferred embodiment, the method includes processing the first debondable surface and the second debondable surface to change a bond strength from a first determined amount to a second determined amount, which is capable of debonding the first debondable surface from the second debondable surface. The method includes debonding the first debondable surface from the second debondable surface to release the thickness of material and the handle substrate.

公开(公告)号：WO2006058076A2

公开(公告)日：2006-06-01

申请号：PCT/US2005/042457

申请日：2005-11-22

申请人： SILICON GENESIS CORPORATION ,  HENLEY, Francois, J.

发明人： HENLEY, Francois, J.

IPC分类号： H01L29/00

CPC分类号： H01L21/26513

摘要： A process for forming multi-layered substrates, e.g ., silicon on silicon. The process includes providing a first substrate, which has a thickness of material to be removed. The thickness of material to be removed includes a first face region. The process includes joining the first face region of the first substrate to a second face region of a second substrate to form an interface region between the first face region of the first substrate and the second face region of the second substrate. The process includes removing the thickness of material from the first substrate while maintaining attachment of the first face region of the first substrate to the second face region of the second substrate. The process implants particles through the interface region to form a region of the particles within the vicinity of the interface region to electrically couple the thickness of material to the second substrate. In a preferred embodiment, the particles are conductive or can also have other characteristics that facilitates electrical contact or coupling between the first face region and the second face region according to a specific embodiment.

摘要翻译： 用于形成多层基板的方法，例如硅上的硅。 该方法包括提供第一基底，其具有待除去的材料的厚度。 要去除的材料的厚度包括第一面区域。 该方法包括将第一衬底的第一面区域连接到第二衬底的第二面区域，以在第一衬底的第一面区域和第二衬底的第二面区域之间形成界面区域。 该方法包括从第一基板去除材料的厚度，同时保持第一基板的第一面区域与第二基板的第二面区域的连接。 该过程通过界面区域投入颗粒以在界面区域附近形成颗粒的区域，以将材料的厚度电耦合到第二基底。 在优选实施例中，根据具体实施例，颗粒是导电的或者还可以具有促进第一面区域和第二面部区域之间的电接触或耦合的其它特性。