公开(公告)号：WO2020080993A1

公开(公告)日：2020-04-23

申请号：PCT/SE2019/050975

申请日：2019-10-07

Applicant: SMOLTEK AB

Inventor： DESMARIS, Vincent ,  ANDERSSON, Rickard ,  SALEEM, Muhammad Amin ,  BYLUND, Maria ,  JOHANSSON, Anders ,  LILJEBERG, Fredrik ,  TIVERMAN, Ola ,  KABIR, M Shafiqul

IPC: H01G4/008 ,  H01G4/06 ,  H01G11/04 ,  H01G11/36 ,  H01L27/02 ,  H05K1/18 ,  B82B1/00 ,  B82Y40/00 ,  B82Y10/00 ,  H01G11/56 ,  H01L28/65 ,  H05K1/181

Abstract: A discrete metal-insulator-metal (MIM) energy storage component, the energy storage component comprising: a MIM-arrangement comprising: a first electrode layer; a plurality of conductive nanostructures grown from the first electrode layer; a conduction controlling material covering each nanostructure in the plurality of conductive nanostructures and the first electrode layer uncovered by the conductive nanostructures; and a second electrode layer covering the conduction controlling material;a first connecting structure for external electrical connection of the capacitor component;a second connecting structure for external electrical connection of the capacitor component; and an electrically insulating encapsulation material at least partly embedding the MIM-arrangement.

公开(公告)号：WO2021262067A1

公开(公告)日：2021-12-30

申请号：PCT/SE2021/050582

申请日：2021-06-15

Applicant: SMOLTEK AB

Inventor： KABIR, M Shafiqul ,  DESMARIS, Vincent ,  JOHANSSON, Anders ,  TIVERMAN, Ola ,  LUNDAHL, Karl ,  ANDERSSON, Rickard ,  SALEEM, Muhammad Amin ,  BYLUND, Maria ,  MARKNÄS, Victor

IPC: H01L27/146 ,  H01L21/78 ,  H01L27/14609 ,  H01L27/14634

Abstract: An image sensor comprising an image sensor layer having a plurality of image sensor layer contact pads; and a plurality of photo-sensitive elements, each being coupled to a respective image sensor layer contact pad; and a capacitor layer having: a plurality of first capacitor contact structures, each being constituted by a capacitor layer top contact pad bonded to a respective image sensor layer contact pad of the image sensor layer; a plurality of second capacitor contact structures; and a plurality of capacitors, embedded in a first dielectric material, each capacitor including at least one electrically conductive vertical nanostructure electrically conductively connected to one of a respective first capacitor contact structure and a respective second capacitor contact structure, and conductively separated from the other one of the respective first capacitor contact structure and the respective second capacitor contact structure by a layer of a second dielectric material.

公开(公告)号：WO2021158158A1

公开(公告)日：2021-08-12

申请号：PCT/SE2021/050053

申请日：2021-01-28

Applicant: SMOLTEK AB

Inventor： KABIR, M Shafiqul ,  DESMARIS, Vincent ,  JOHANSSON, Anders ,  TIVERMAN, Ola ,  LUNDAHL, Karl ,  ANDERSSON, Rickard ,  SALEEM, Muhammad Amin ,  BYLUND, Maria ,  MARKNÄS, Victor

IPC: H01L23/522 ,  H01G4/008 ,  H01G4/06 ,  H01L27/02 ,  H05K1/18 ,  B82B1/00 ,  B82Y40/00 ,  H03K19/003

Abstract: An electronic system comprising a substrate with a substrate conductor pattern including substrate pads; a semiconductor component with active circuitry, and component pads coupled to the active circuitry of the semiconductor component and connected to the substrate pads of the substrate; a power source interface for receiving power from a power source; and a power distribution network for distributing power from the power source interface to the active circuitry of the semiconductor component. The power distribution network includes a first capacitor realized by conductive structures comprised in the semiconductor component, the first capacitor being coupled to a first component pad and a second component pad of the semiconductor component; a second capacitor arranged between the substrate and the semiconductor component, the second capacitor being coupled to the first component pad and the second component pad of the component package; and a power grid portion of the substrate conductor pattern.

公开(公告)号：WO2021211038A1

公开(公告)日：2021-10-21

申请号：PCT/SE2021/050335

申请日：2021-04-13

Applicant: SMOLTEK AB

Inventor： KABIR, M Shafiqul ,  DESMARIS, Vincent ,  JOHANSSON, Anders ,  TIVERMAN, Ola ,  LUNDAHL, Karl ,  ANDERSSON, Rickard ,  SALEEM, Muhammad Amin ,  BYLUND, Maria ,  MARKNÄS, Victor

IPC: H01G4/005 ,  H01G4/06 ,  H01G4/30 ,  H01L27/02 ,  H05K1/18 ,  B82B1/00 ,  B82Y40/00

Abstract: A MIM energy storage device comprising a bottom electrode; a plurality of electrically conductive vertical nanostructures; a bottom conduction- controlling layer conformally coating each nanostructure in the plurality of electrically conductive vertical nanostructures; and a layered stack of alternating conduction-controlling layers and electrode layers conformally coating the bottom conduction-controlling layer, the layered stack including at least a first odd-numbered electrode layer at a bottom of the layered stack, a first odd-numbered conduction-controlling layer directly on the first odd- numbered electrode layer, and a first even-numbered electrode layer directly on the first odd-numbered conduction-controlling layer. Each even-numbered electrode layer in the layered stack is electrically conductively connected to the bottom electrode; and each odd-numbered electrode layer in the layered stack is electrically conductively connected to any other odd-numbered electrode layer in the layered stack.

公开(公告)号：WO2020112005A1

公开(公告)日：2020-06-04

申请号：PCT/SE2019/051176

申请日：2019-11-20

Applicant: SMOLTEK AB

Inventor： KABIR, M Shafiqul ,  DESMARIS, Vincent ,  ANDERSSON, Rickard ,  SALEEM, Muhammad Amin ,  BYLUND, Maria ,  JOHANSSON, Anders ,  LILJEBERG, Fredrik ,  TIVERMAN, Ola

IPC: H01G4/008 ,  H01G4/06 ,  H01L23/498 ,  H01L23/538 ,  H01L23/64 ,  H01L27/02 ,  H05K1/18 ,  B82B1/00 ,  B82Y40/00 ,  H01L25/11

Abstract: A semiconductor assembly, comprising: a first semiconductor die including processing circuitry and pads, said first semiconductor die having a first surface and a second surface opposite the first surface; a second semiconductor die including memory circuitry and pads, said second semiconductor die being arranged on one of the first surface and the second surface of said first semiconductor die, and pads of said second semiconductor die being coupled to pads of said first semiconductor die; and at least a first capacitor having terminals, said first capacitor being arranged on one of the first surface and the second surface of said first semiconductor die and the terminals of said capacitor being coupled to pads of said first semiconductor die.