US09281519B2
Provided is a lithium ion positive electrode active material for a secondary battery that can realize a high operating voltage and a high capacity while suppressing capacity drop with cycles by using a low-cost material. A positive electrode active material for a secondary battery, which is a lithium manganese composite oxide represented by the following general formula (I) Lia(MxMn2−x−yYy)(O4−wZw) (I) wherein in the formula (I), 0.5≦x≦1.2, 0
US09281505B2
A battery mounting structure for a vehicle includes a battery frame upper fabricated of fiber-reinforced resin, a battery frame lower fabricated of fiber-reinforced resin, and an intermediate member fabricated of fiber-reinforced resin. A battery that is disposed at a vehicle body lower side of a floor panel is attached at the battery frame upper. With the battery frame upper the battery frame lower structures a closed cross section structure. The intermediate member is interposed between the battery frame upper and the battery frame lower. The intermediate member is provided with a plural number of upper end portions that abut against or are disposed close to a lower face of the battery frame upper and a plural number of lower end portions that abut against or are disposed close to an upper face of the battery frame lower.
US09281494B2
A display device includes: a display substrate; a display unit formed on the display substrate and a sealing substrate affixed to the display substrate by an adhering layer that surrounds the display unit. The sealing substrate includes a composite member including a resin and a plurality of carbon fibers and an insulating member attached to the composite member. The insulating member includes a through hole. A metal film is disposed at one side of the sealing substrate, facing the display substrate; and a conductive connection portion contact the metal film through the through hole.
US09281493B2
A flexible substrate, a manufacturing method for the flexible substrate and an OLED display device including the flexible substrate are provided. The flexible substrate includes a flexible base on which a mesh depression layer is provided, in which a mesh current sinking layer is embedded. The mesh current sinking layer is configured to enhance electrical conductivity of the flexible substrate. With the mesh depression layer, the mesh current sinking layer may be embedded in the flexible substrate, which effectively enhances the electrical conductivity of the flexible substrate.
US09281491B2
A white organic light emitting device including an anode and a cathode opposite to each other, a plurality of stacks disposed between the anode and the cathode, each of the stacks including a hole transport layer, a light emitting layer and an electron transport layer, and an n-type charge generation layer and a p-type charge generation layer disposed between different adjacent stacks, wherein the n-type charge generation layer includes a first organic host, and the p-type charge generation layer includes a second organic host having a LUMO energy level smaller than or equal to a LUMO energy level of the first organic host, and an inorganic dopant containing 1% to 20% by volume of a metal.
US09281490B2
The present specification discloses an organic electroluminescent device including: a substrate; a cathode provided on the substrate; a light emitting layer provided on the cathode; an anode provided on the light emitting layer; a first p-type organic material layer provided between the cathode and the light emitting layer; and a first n-type organic material layer provided between the first p-type organic material layer and the light emitting layer.
US09281489B2
The objects of the present invention are to provide an organic luminescent material capable of being easily controlled for dopant concentrations. The present invention is characterized in that a organic light-emitting device comprising a upper electrode, a lower electrode; and a light-emitting layer positioned between the upper electrode and the lower electrode, wherein the light-emitting layer contains a host, a first dopant and a second dopant, the first dopant is a blue-light-emitting dopant or a green-light-emitting dopant, the first dopant has a first functional group, and the first functional group makes the first dopant transfer toward the surface of the light-emitting layer on the upper electrode side in the light-emitting layer.
US09281483B2
Compounds comprising phosphorescent metal complexes comprising cyclometallated imidazo[1,2-f]phenanthridine and diimidazo[1,2-a:1′,2′-c]quinazoline ligands, or isoelectronic or benzannulated analogs thereof, are described. Organic light emitting diode devices comprising these compounds are also described.
US09281480B2
In one embodiment, a method for forming pattern includes forming a guide layer on a substrate, forming a copolymer layer of a high-molecular block copolymer on the guide layer; and forming a phase-separation structure with a phase-separation cycle d by self-assembling the copolymer layer. The high-molecular block copolymer includes a first and a second polymer. The guide layer includes a first and a second region disposed on the substrate. Widths of the first and second region respectively are approximately (d/2)×n and (d/2)×m. Both of the first and second region are to be pinned with none of the first and second polymer. Surface energies of the first and second region are different from one another. Integers n and m are odd numbers. Value d is a phase-separation cycle of the high-molecular block copolymer.
US09281472B2
The present invention provides a memory structure including a resistance-changing storage element, which enables a reset operation with a reset gate and in which cross-sectional areas of a resistance-changing film and a lower electrode in a current-flowing direction can be decreased. The semiconductor device of the present invention comprises a first pillar-shaped semiconductor layer, a gate insulating film formed around the first pillar-shaped semiconductor layer, a gate electrode made of a metal and formed around the gate insulating film, a gate line made of a metal and connected to the gate electrode, a second gate insulating film formed around an upper portion of the first pillar-shaped semiconductor layer, a first contact made of a second metal and formed around the second gate insulating film, a second contact which is made of a third metal and which connects an upper portion of the first contact to an upper portion of the first pillar-shaped semiconductor layer, a second diffusion layer formed in a lower portion of the first pillar-shaped semiconductor layer, a pillar-shaped insulating layer formed on the second contact, a resistance-changing film formed around an upper portion of the pillar-shaped insulating layer, a lower electrode formed around a lower portion of the pillar-shaped insulating layer and connected to the resistance-changing film, a reset gate insulating film that surrounds the resistance-changing film, and a reset gate that surrounds the reset gate insulating film.
US09281469B2
The blocking temperature of the AFM layer in a TMR sensor has been raised by inserting a magnetic seed layer between the AFM layer and the bottom shield. This gives the device improved thermal stability, including improved SNR and BER.
US09281467B2
An embodiment of the invention includes a memory cell having a magnet layer coupled to a metal layer and read line. The metal layer is also coupled to write and sense lines. During a write operation charge current is supplied to the metal layer via the write line and induces spin current and a magnetic state within the magnet layer based on the spin Hall effect. During a read operation read current is supplied, via the read line, to the magnet layer and then the metal layer and induces another spin current, within the metal layer, that generates an electric field and voltage, based on inverse spin Hall effect, at a sense node coupled to the sense line. The voltage polarity is based on the aforementioned magnetic state. The memory operates with a low supply voltage to drive charge, read, and spin currents. Other embodiments are described herein.
US09281466B2
A magnetic cell includes a magnetic region formed from a precursor magnetic material comprising a diffusive species and at least one other species. An amorphous region is proximate to the magnetic region and is formed from a precursor trap material comprising at least one attracter species having at least one trap site and a chemical affinity for the diffusive species. The diffusive species is transferred from the precursor magnetic material to the precursor trap material where it bonds to the at least one attracter species at the trap sites. The species of the enriched trap material may intermix such that the enriched trap material becomes or stays amorphous. The depleted magnetic material may then be crystallized through propagation from a neighboring crystalline material without interference from the amorphous, enriched trap material. This enables high tunnel magnetoresistance and high magnetic anisotropy strength. Methods of fabrication and semiconductor devices are also disclosed.
US09281459B2
A light-emitting device includes a substrate; a stacked structure including a first type semiconductor layer positioned on the substrate, a light-emitting structure positioned on the first type semiconductor layer, and a second type semiconductor layer positioned on the light-emitting structure, wherein the stacked structure includes a depression exposing the first type semiconductor layer; a first electrode positioned on the first type semiconductor layer in the depression, the first electrode including at least one first pad and at least one first extending wire with one end connected to the first pad; a second electrode positioned on the second type semiconductor layer, the second electrode including at least one second pad and at least one second extending wire with one end connected to the second pad; wherein the distance between the first pad and the second pad is greater than 70% of the width of the light-emitting device.
US09281456B2
A light-emitting device includes a light-emitting element for emitting primary light, and a wavelength conversion unit for absorbing part of the primary light and emitting secondary light having a wavelength longer than that of the primary light, wherein the wavelength conversion unit includes plural kinds of phosphors having light absorption characteristics different from each other, and then at least one kind of phosphor among the plural kinds of phosphors has an absorption characteristic that can absorb the secondary light emitted from at least another kind of phosphor among the plural kinds of phosphors.
US09281454B2
Light emitting devices comprise a substrate having a surface and a side surface; a semiconductor structure on the surface of the substrate, the semiconductor structure having a first surface, a second surface and a side surface, wherein the second surface is opposite the first surface, wherein the first surface, relative to the second surface, is proximate to the substrate, and wherein the semiconductor structure comprises a first-type layer, a light emitting layer and a second-type layer; a first and a second electrodes; and a wavelength converting element arranged on the side surface of the semiconductor structure, wherein the wavelength converting element has an open space, and wherein the open space is a portion not covered by the wavelength converting element.
US09281453B2
A method of producing an optoelectronic component includes providing a cavity; introducing a liquid matrix material with phosphor particles distributed therein into the cavity; introducing a semiconductor chip into the matrix material; sedimenting the phosphor particles in the matrix material; and curing the matrix material, wherein a conversion layer including phosphor particles is produced, said conversion layer being arranged on the semiconductor chip.
US09281445B2
An LED includes a mesa having a Group III Nitride mesa face and a mesa sidewall, on an underlying LED structure. The mesa face includes Group III Nitride surface features having tops that are defined by mask features, having bottoms, and having sides that extend along crystal planes of the Group III Nitride. The mask features may include a two-dimensional array of dots that are spaced apart from one another. Related fabrication methods are also disclosed.
US09281443B2
The application provides a light-emitting diode array, including: a first light-emitting diode including a first area; a second area; a first isolation path between the first area and the second area, and the first isolation path including an electrode isolation layer; and an electrode contact layer covering the first area; a second light-emitting diode including a semiconductor stack layer; and a second electrical bonding pad on the semiconductor stack layer; and a second isolation path between the first light-emitting diode and the second light-emitting diode, wherein the second isolation path includes an electrical connecting structure electrically connected to the first light-emitting diode and the second light-emitting diode.
US09281441B2
A device comprising a semiconductor layer including a plurality of compositional inhomogeneous regions is provided. The difference between an average band gap for the plurality of compositional inhomogeneous regions and an average band gap for a remaining portion of the semiconductor layer can be at least thermal energy. Additionally, a characteristic size of the plurality of compositional inhomogeneous regions can be smaller than an inverse of a dislocation density for the semiconductor layer.
US09281439B2
A nitride semiconductor element 1 includes a base structure part 5, and an element structure part 11 formed on the base structure part 5 and having at least an n-type AlGaN based semiconductor layer 6, and p-type AlGaN based semiconductor layers 8, 9, 10, and further includes an n-electrode contact part 13a formed on the n-type AlGaN based semiconductor layer 6, an n-electrode pad part 13b formed on the n-electrode contact part 13a, and a p-electrode 12 formed on the p-type AlGaN based semiconductor layers 8, 9, 10, in which an AlN mole fraction in the n-type AlGaN based semiconductor layer 6 is 20% or more, the n-electrode contact part 13a includes one or more metal layers, and the p-electrode 12 and the n-electrode pad part 13b have a common laminated structure of two or more layers having an Au layer as an uppermost layer, and an Au diffusion preventing layer composed of conductive metal oxide and formed under the uppermost layer to prevent Au diffusion.
US09281425B2
A method for producing a semiconductor component is disclosed. A carrier substrate includes a mounting region and an opening, which is formed in the mounting region of the carrier substrate. After mounting a semiconductor chip, an electrically insulating layer is applied to the carrier substrate in such a way that the electrically insulating layer completely fills the first opening in the carrier substrate. A second opening is formed in the electrically insulating layer. An electrically conductive layer is then applied to the electrically insulating layer in such a way that the second opening is filled with the electrically conductive layer in the form of a via. A semiconductor component produced in this way is also provided.
US09281422B2
A method includes obtaining a photosensor substrate (236) having two opposing major surfaces. One of the two opposing major surfaces includes at least one photosensor row (230) of at least one photosensor element (232, 234), and the obtained photosensor substrate has a thickness equal to or greater than one hundred microns. The method further includes optically coupling a scintillator array (310) to the photosensor substrate. The scintillator array includes at least one complementary scintillator row (224) of at least one complementary scintillator element (226, 228), and the at least one complementary scintillator row is optically coupled to the at least one photosensor row (230) and the at least one complementary scintillator element is optically coupled to the at least one photosensor element. The method further includes thinning the photosensor substrate optically coupled to the scintillator producing a thinned photosensor substrate that is optically coupled to the scintillator and that has a thickness on the order of less than one hundred microns.
US09281421B2
A conductive reflective film has a silver nanoparticle-sintered film with a surface coating composition containing a hydrolysate of a metal alkoxide wet-coated thereto. The coated film is then fired. Also provided is a method of manufacturing the conductive reflective film comprising the steps of coating a surface coating composition containing a hydrolysate of a metal alkoxide on a silver nanoparticle-sintered film using a wet coating method, and firing the silver nanoparticle-sintered film having the coated film. The conductive reflective film provides improved adhesion properties with respect to a base material while maintaining a high reflectivity and a high conductivity of a silver nanoparticle-sintered film.
US09281387B2
A high voltage durability III-nitride semiconductor device comprises a support substrate including a first silicon body, an insulator body over the first silicon body, and a second silicon body over the insulator body. The high voltage durability III-nitride semiconductor device further comprises a III-nitride semiconductor body characterized by a majority charge carrier conductivity type, formed over the second silicon body. The second silicon body has a conductivity type opposite the majority charge carrier conductivity type. In one embodiment, the high voltage durability III-nitride semiconductor device is a high electron mobility transistor (HEMT) comprising a support substrate including a <100> silicon layer, an insulator layer over the <100> silicon layer, and a P type conductivity <111> silicon layer over the insulator layer. The high voltage durability HEMT also comprises a III-nitride semiconductor body formed over the P type conductivity <111> silicon layer, the III-nitride semiconductor body forming a heterojunction of the HEMT.
US09281368B1
A plurality of gate trenches is formed into a semiconductor substrate in an active cell region. One or more other trenches are formed in a different region. Each gate trench has a first conductive material in lower portions and a second conductive material in upper portions. In the gate trenches, a first insulating layer separates the first conductive material from the substrate, a second insulating layer separates the second conductive material from the substrate and a third insulating material separates the first and second conductive materials. The other trenches contain part of the first conductive material in a half-U shape in lower portions and part of the second conductive material in upper portions. In the other trenches, the third insulating layer separates the first and second conductive materials. The first insulating layer is thicker than the third insulating layer, and the third insulating layer is thicker than the second.
US09281362B2
According to an example embodiment, a semiconductor device includes a substrate having a cell array region and a peripheral circuit region. The substrate includes first active regions defined by a first trench isolation region in the cell array region, a second active region defined by a second trench isolation region in the peripheral circuit region, and at least one deep trench isolation region. The first active regions may be aligned to extend longitudinally in a first direction in the cell array region. The at least one deep trench isolation region is recessed in the substrate to a level lower than those of other points of a bottom surface of the second trench isolation region in the peripheral circuit region. The at least one deep trench isolation region includes at least one point that is spaced apart in the first direction from a corresponding one of the first active regions.
US09281358B2
A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used for a channel. An oxide semiconductor film which can have a first crystal structure by heat treatment and an oxide semiconductor film which can have a second crystal structure by heat treatment are formed so as to be stacked, and then heat treatment is performed; accordingly, crystal growth occurs with the use of an oxide semiconductor film having the second crystal structure as a seed, so that an oxide semiconductor film having the first crystal structure is formed. An oxide semiconductor film formed in this manner is used for an active layer of the transistor.
US09281356B2
A method of fabricating a semiconductor device is disclosed. The method includes providing a substrate including an isolation region, forming a resistor over the isolation region, and forming a contact over the resistor. The method also includes implanting with a dopant concentration that is step-increased at a depth of the resistor and that remains substantially constant as depth increases.
US09281355B2
An electronic device comprising a semiconductor structure having a back end capacitor and a back end thin film resistor and a method of manufacturing the same. The semiconductor structure includes a first dielectric layer, a bottom plate of the capacitor and a thin film resistor body. The bottom plate and the resistor body are laterally spaced apart portions of the same thin film layer. The bottom plate further includes a conductive layer overlying the thin film layer. A second dielectric layer is disposed on the conductive layer of the bottom plate of the capacitor. A top plate of the capacitor is disposed on the second dielectric layer.
US09281346B1
A display device includes an array substrate including a display area and a non-display area, a driving circuit chip disposed on the non-display area and including a bottom surface, a top surface, a first pair of side surfaces extending in a first direction, and a second pair of side surfaces extending in a second direction perpendicular to the first direction, and first, second, and dummy bumps, each disposed on the bottom surface in a single column along the first direction, in which the dummy bumps include first and second dummy bump groups disposed between the first and second bumps along the first direction, the dummy bumps in the first dummy bump group are spaced apart from each other by a first pitch, and the dummy bumps in the second dummy bump group are spaced apart from each other by a second pitch different from the first pitch.
US09281343B2
A thin film transistor display panel includes: a gate electrode, a source electrode and a drain electrode which are included in a thin film transistor on a substrate; a data line connected to the source electrode; a pixel link member connecting the drain electrode to a pixel electrode; and a gate pad connected to the gate electrode through a gate line and including a first gate subpad, a second gate subpad and a gate pad link member, in which the pixel link member and the gate pad link member are substantially same in thickness.
US09281339B1
A method for mounting a chip on a printed circuit board (PCB) is disclosed. The method includes the steps of: providing a chip having a plurality of bonding pads and a PCB having a recess portion and a plurality of connectors; gluing the recess portion; placing the chip into the recess portion; and forming circuit patterns linking associated bonding pad and connector. A bottom of the recess portion is substantially flat and a shape of the recess portion is similar to that of the chip but large enough so that the chip can be fixed in the recess portion after being glued.
US09281333B2
A solid-state imaging device is provided. The solid-state imaging device includes a substrate containing a plurality of photoelectric conversion elements. A color filter layer is disposed above the photoelectric conversion elements. A light shielding layer is disposed between the color filter layer and substrate. The light-shielding layer has a plurality of first light shielding partitions extended along a first direction and a plurality of second light shielding partitions extended along a second direction perpendicular to the first direction. The first light shielding partitions have different dimensions along the second direction and the second light shielding partitions have different dimensions along the first direction.
US09281330B2
One sensor pixel includes amplifying transistor, coupled between first bias line and data line; switch transistor, operated by control line and coupled between data line and gate of amplifying transistor; storage capacitor, coupled to second bias line; and sensor being coupled to gate of amplifying transistor. Another sensor pixel includes first amplifying transistor coupled between first bias line and data line; second amplifying transistor being coupled between second bias line and data line; switch transistor being operated by control line and being coupled between data line and gates of first and second amplifying transistors; storage capacitor coupled to gates of first and second amplifying transistors; and sensor coupled to gates of first and second amplifying transistors. Trap-assisted absorption, variable capacitor described for sensor pixels, and also biasing to reduce flicker and aging, and to compensate for aging, described for sensor pixels.
US09281329B2
By selectively anisotropically etching a stack film formed to cover a plurality of photodiodes and a gate electrode layer of a MOS transistor, the stack film remains on each of the plurality of photodiodes to form a lower antireflection coating and the stack film remains on a sidewall of the gate electrode layer to form a sidewall Using the gate electrode layer and the sidewall as a mask, an impurity is introduced to form a source/drain region of the MOS transistor. After the impurity was introduced, an upper antireflection coating is formed at least on a lower antireflection coating At least any of the upper antireflection coating and the lower antireflection coating is etched such that the antireflection coatings on the two respective photodiodes are different in thickness from each other.
US09281327B2
There is provided an apparatus including an image sensor of a back-illuminated type using a complementary metal oxide semiconductor (CMOS), including a light receiving unit, formed in a semiconductor substrate, which receives incident light, an anti-reflection film formed on a back-surface side of the semiconductor substrate in which the light receiving unit is formed, and a silicon oxide film, formed on a back-surface side of the anti-reflection film, which has a refractive index lower than a silicon nitride film and has a higher density in a back-surface side than in a front-surface side thereof.
US09281322B2
A thin film transistor array panel is disclosed. The thin film transistor array panel may include a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, a data wiring layer disposed on the substrate and including a data line crossing the gate line, a source electrode connected to the data line and a drain electrode facing the source electrode, a polymer layer covering the source electrode and the drain electrode, and a passivation layer disposed on the polymer layer. The data wiring layer may include copper or a copper alloy and the polymer layer may include fluorocarbon.
US09281318B2
A method to fabricate a three dimensional memory structure includes forming an array stack, creating a layer of sacrificial material above the array stack, etching a hole through the layer of sacrificial material and the array stack, creating a pillar of semiconductor material in the hole to form at least two vertically stacked flash memory cells that use the pillar as a common body, removing at least some of the layer of sacrificial material around the pillar to expose a portion of the pillar, and forming a field effect transistor (FET) using the portion of the pillar as the body of the FET.
US09281315B1
A memory structure and a method for manufacturing the same are provided. The memory structure comprises a substrate, stacks, memory layers, a conductive material and conductive lines. The stacks are positioned on the substrate. The stacks are separated from each other by trenches. Each of the stacks comprises alternately stacked conductive stripes and insulating stripes. The memory layers conformally cover the stacks respectively. The conductive material is positioned in the trenches and on the stacks. The conductive material in the trenches forms one or more holes in each of the trenches. The conductive lines are positioned on the conductive material. Each of the conductive lines comprises a first portion and a second portion connected to each other, the first portion extends along a direction perpendicular to an extending direction of the stacks, and the second portion extends along the extending direction of the stacks.
US09281314B1
Non-volatile storage devices and methods for fabricating non-volatile storage device are described. Sidewalls of the memory cells and their associated word line may be covered with silicon oxide. Silicon nitride covers the silicon oxide adjacent to the word lines, which may provide protection for the word lines during fabrication. However, silicon nitride can trap charges, which can degrade operation if the trapped charges are near a charge trapping region of a memory cell. Thus, the silicon nitride does not cover the silicon oxide adjacent to charge storage regions of the memory cells, which can improve device operation. For example, memory cell current may be increased. Techniques for forming such a device are also disclosed. One aspect includes a method that uses a sacrificial material to control formation of a silicon nitride layer when forming a memory device.
US09281311B2
An integrated circuit includes a plurality of metal layers of bit cells of a memory cell array disposed in a first metal layer and extending in a first direction, a plurality of word lines of the memory cell array disposed in a second metal layer and extending in a second direction that is different from the first direction, and at least two conductive traces disposed in a third metal layer substantially adjacent to each other and extending at least partially across the memory cell array, a first one of the at least two conductive traces coupled to a driving source node of a write assist circuit, and a second conductive trace of the at least two conductive traces coupled to an enable input of the write-assist circuit, where the at least two conductive traces form at least one embedded capacitor having a capacitive coupling to the bit line.
US09281308B2
A method (and semiconductor device) of fabricating a semiconductor device adjusts gate threshold (Vt) of a field effect transistor (FET) with raised source/drain (S/D) regions. A halo region is formed in a two-step process that includes implanting dopants using conventional implantation techniques and implanting dopants at a specific twist angle. The dopant concentration in the halo region near the active edge of the raised S/D regions is higher and extends deeper than the dopant concentration within the interior region of the raised S/D regions. As a result, Vt near the active edge region is adjusted and different from the Vt at the active center regions, thereby achieving same or similar Vt for a FET with different width.
US09281292B2
In one embodiment of the invention, a system in package (SiP) is described which includes a plurality of device components with different form factors embedded within a molding compound layer. A surface for each of the device components is coplanar with a surface of the molding compound layer, and a single redistribution layer (RDL) formed on the coplanar surfaces of the molding compound layer and the plurality of device components. An active device die is electrically bonded to the single RDL directly vertically adjacent the plurality of device components. In an embodiment, the SiP is electrically connected to a circuit board with the active device die between the single RDL and the circuit board. In an embodiment, the SiP is electrically connected to a circuit board with the active device die over the single RDL and the circuit board.
US09281291B2
To provide a technique capable of positioning of a semiconductor chip and a mounting substrate with high precision by improving visibility of an alignment mark. In a semiconductor chip constituting an LCD driver, a mark is formed in an alignment mark formation region over a semiconductor substrate. The mark is formed in the same layer as that of an uppermost layer wiring (third layer wiring) in an integrated circuit formation region. Then, in the lower layer of the mark and a background region surrounding the mark, patterns are formed. At this time, the pattern P1a is formed in the same layer as that of a second layer wiring and the pattern P1b is formed in the same layer as that of a first layer wiring. Further, the pattern P2 is formed in the same layer as that of a gate electrode, and the pattern P3 is formed in the same layer as that of an element isolation region.
US09281287B2
A system and method for bonding semiconductor devices is provided. An embodiment comprises halting the flow of a eutectic bonding material by providing additional material of one of the reactants in a grid pattern, such that, as the eutectic material flows into the additional material, the additional material will change the composition of the flowing eutectic material and solidify the material, thereby stopping the flow. Other embodiments provide for additional layouts to put the additional material into the path of the flowing eutectic material.
US09281280B2
A bonding pad for thermocompression bonding of a carrier material to a further carrier material includes a base layer and a top layer. The base layer is made of metal, is deformable, and is connected to the carrier material. The metal is nickel-based. The top layer is metallic and is connected directly to the base layer. The top layer is arranged at least on a side of the base layer which faces away from the carrier material. The top layer has a smaller layer thickness than the base layer. In at least one embodiment, the top layer has a greater oxidation resistance than the base layer.
US09281277B2
A wiring structure includes a first insulation layer, a plurality of wiring patterns, a protection layer pattern and a second insulation layer. The first insulation layer may be formed on a substrate. A plurality of wiring patterns may be formed on the first insulation layer, and each of the wiring patterns may include a metal layer pattern and a barrier layer pattern covering a sidewall and a bottom surface of the metal layer pattern. The protection layer pattern may cover a top surface of each of the wiring patterns and including a material having a high reactivity with respect to oxygen. The protection layer pattern may cover a top surface of each of the wiring patterns and including a material having a high reactivity with respect to oxygen.
US09281257B2
The semiconductor package according to an exemplary embodiment in the present disclosure includes: at least one electronic device; a lead frame including a plurality of leads electrically connected to the electronic device; a lead connecting member coupled to at least one of the leads; and a molded portion sealing the electronic device and the lead connecting member.
US09281253B2
A method of controlling polishing includes polishing a substrate at a first polishing station, monitoring the substrate with a first eddy current monitoring system to generate a first signal, determining an ending value of the first signal for an end of polishing of the substrate at the first polishing station, determining a first temperature at the first polishing station, polishing the substrate at a second polishing station, monitoring the substrate with a second eddy current monitoring system to generate a second signal, determining a starting value of the second signal for a start of polishing of the substrate at the second polishing station, determining a gain for the second polishing station based on the ending value, the starting value and the first temperature, and calculating a third signal based on the second signal and the gain.
US09281225B2
A substrate processing apparatus including a transfer unit for transferring, under reduced pressure, a laminate including a wafer and a support plate which are bonded to each other and supported by use of support pins that supports an inner periphery of a first surface of the wafer, the first surface being opposite to a second surface of the wafer onto which a second surface the support plate is bonded.
US09281222B2
A wafer handling system may include upper and lower linked robot arms that may move a wafer along a nonlinear trajectory between chambers of a semiconductor processing system. These features may result in a smaller footprint in which the semiconductor processing system may operate, smaller transfer chambers, smaller openings in process chambers, and smaller slit valves, while maintaining high wafer throughput. In some embodiments, simultaneous fast wafer swaps between two separate chambers, such as load locks and ALD (atomic layer deposition) carousels, may be provided. Methods of wafer handling are also provided, as are other aspects.
US09281218B2
A method of manufacturing a lead frame includes providing an electrically conductive layer having a plurality of holes at a top surface. The plurality of holes form a structure of leads and a die pad on the electrically conductive layer. The plurality of holes are filled with a non-conductive material. Next; an electrically conductive foil is attached on the top surface of the electrically conductive layer and the non-conductive epoxy material. Then, the electrically conductive foil is etched to create a network of leads, die pad, bus lines, dam bars and tie lines, wherein the bus lines connect the leads to the dam bar, the dam bar is connected to the tie line and the tie line is connected to the die pad.
US09281217B1
A method of manufacturing a semiconductor memory device includes forming a first attached layer on a substrate, forming a stack layer on the first attached layer, separating the stack layer and the first attached layer from each other, forming vertical holes by performing a first etch process on the stack layer in a direction from bottom to top, removing the first attached layer, attaching the stack layer in which the vertical holes are formed to the substrate, and performing a second etch process so that each of the vertical holes has a uniform width.
US09281213B2
A process of forming an integrated circuit forms a high precision capacitor bottom plate with a metallic surface and performs a plasma treatment of the metallic surface. A high precision capacitor dielectric is formed by depositing a first layer of the capacitor dielectric on the high precision capacitor bottom plate wherein the first layer is silicon nitride, depositing a second layer of the capacitor dielectric on the first layer wherein the second portion is silicon dioxide, and depositing a third layer of the capacitor dielectric on the second portion wherein the third layer is silicon nitride. Plasma treatments may also be performed on the layers of capacitor dielectric pre- and/or post-deposition. A metallic high precision capacitor top plate is formed on the high precision capacitor dielectric.
US09281209B1
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a material layer on the substrate; forming a patterned first hard mask on the material layer; forming a patterned second hard mask on the material; utilizing the patterned first hard mask and the patterned second hard mask to remove part of the material layer for forming sacrificial mandrels; forming sidewall spacers adjacent to the sacrificial mandrels; removing the sacrificial mandrels; and using the sidewall spacers to remove part of the substrate.
US09281208B2
A method of forming a semiconductor structure can include forming a photolithography mask on a silicon fin having a hard mask layer thereon extending in a first direction. A trench can be formed through the hard mask layer into the silicon fin using the photolithography mask, where the trench extends in a second direction to separate the silicon fin into first and second fin structures extending end-to-end in the first direction. A portion of the trench formed by the hard mask layer can be widened relative to a lower portion of the trench defined by the first and second fin structures.
US09281207B2
Solution processible hardmasks are described that can be formed from aqueous precursor solutions comprising polyoxometal clusters and anions, such as polyatomic anions. The solution processible metal oxide layers are generally placed under relatively thin etch resist layers to provide desired etch contrast with underlying substrates and/or antireflective properties. In some embodiments, the metal oxide hardmasks can be used along with an additional hardmask and/or antireflective layers. The metal oxide hardmasks can be etched with wet or dry etching. Desirable processing improvements can be obtained with the solution processible hardmasks.
US09281202B2
A nonvolatile memory cell and a method for fabricating the same can secure stable operational reliability as well as reducing a cell size. The nonvolatile memory cell includes a drain region formed in a substrate, a source region formed in the substrate to be separated from the drain region, a floating gate formed over the substrate between the drain region and the source region, a halo region formed in the substrate in a direction that the drain region is formed, a dielectric layer formed on sidewalls of the floating gate, and a control gate formed over the dielectric layer to overlap with at least one sidewall of the floating gate.
US09281201B2
A method of manufacturing a semiconductor device having a metal gate is provided. A substrate having a first conductive type transistor and a second conductive type transistor formed thereon is provided. The first conductive type transistor has a first trench and the second conductive type transistor has a second trench. A first work function layer is formed in the first trench. A hardening process is performed for the first work function layer. A softening process is performed for a portion of the first work function layer. A pull back step is performed to remove the portion of the first work function layer. A second work function layer is formed in the second trench. A low resistive metal layer is formed in the first trench and the second trench.
US09281198B2
A method of forming a semiconductor device is disclosed. The method includes forming a first dielectric layer on a substrate; forming a set of bias lines on the first dielectric layer; covering the set of bias lines with a second dielectric layer; forming a semiconductor layer on the second dielectric layer; and forming a set of devices on the semiconductor layer above the set of bias lines.
US09281195B2
A semiconductor structure has a MOSFET and a substrate to accommodate the MOSFET. The MOSFET has a gate, a source, and a drain in the substrate. A first substrate region surrounding the MOSFET is doped with a stress enhancer, wherein the stress enhancer is configured to generate a tensile stress in the MOSFET's channel and the tensile stress is along the channel's widthwise direction.
US09281189B2
Disclosed is a method of manufacturing a thin film, the method including: growing an epitaxial layer on a surface of a wafer at a growth temperature, wherein the growing of the epitaxial layer comprises controlling a defect present on a surface of the wafer. Also, disclosed is a wafer including: a substrate; and an epitaxial layer located on the substrate, wherein a basal dislocation density of the epitaxial layer is equal to or less than 1/cm2.
US09281188B2
A method for fabricating a wafer according to the embodiment comprises the steps of depositing an epi layer in an epi deposition part; transferring the wafer to an annealing part connected to the epi deposition part; annealing the wafer in the annealing part; transferring the wafer to a cooling part connected to the annealing part; and cooling the wafer in the cooling part, wherein the depositing of the wafer, the annealing of the wafer and the cooling of the wafer are continuously performed. An apparatus for fabricating a wafer according to the embodiment comprises an epi deposition part; an annealing part connected to the epi deposition part; and a cooling part connected to the annealing part.
US09281187B2
The invention provides a method for manufacturing a nitride semiconductor device that grows a multilayer film of a III-V group nitride semiconductor in a reaction furnace into which a III group element raw material gas and a V group element raw material gas are introduced, the method including: growing a first nitride semiconductor layer at a first raw material gas flow rate of the V group element raw material gas and a first carrier gas flow rate; and growing a second nitride semiconductor layer at a second raw material gas flow rate of the V group element raw material gas lower than the first raw material gas flow rate and a second carrier gas flow rate higher than the first carrier gas flow rate, wherein the first nitride semiconductor layer and the second nitride semiconductor layer are stacked.
US09281176B2
Provided is a microwave plasma discharge lamp apparatus which includes a rectangular waveguide having a rectangular shape one end of which is closed and the other end is open and receiving a microwave through an opening to put out linearly polarized microwaves; a discharge lamp; a resonator cavity, formed in a cylindrical shape, one end of which is open, which is disposed to surround the discharge lamp, and which is made of a conductive mesh, thereby allowing the passage of the light from the discharge lamp; and a phase shifter, which has a cross-shaped waveguide opened in a propagation direction of the linearly polarized microwaves, is disposed between the other end of the rectangular waveguide and one end of the resonator cavity, and receives the linearly polarized microwaves from the rectangular waveguide to generate elliptically polarized microwaves in the cylindrical resonator cavity. The elliptically polarized microwaves discharge the discharge lamp.
US09281169B2
Provided is a mass spectrometer capable of easy exchange of a measurement sample and suppressing a carryover. The mass spectrometer includes a mass spectrometry section, an ion source the internal pressure of which is reduced by a differential pumping from the mass spectrometry section and the ion source ionizes the sample gas, a sample container in which the sample gas is generated by vaporizing the measurement sample, a thin pipe that introduces the sample gas generated in the sample container into the ion source, an elastic tube of openable and closable that connects the sample container and the thin pipe, a pair of weirs that closes or opens the elastic tube so as to sandwich the elastic tube, and a cartridge that integrates the sample container, the thin pipe, and the elastic tube, and is detachable in a lump from a main body of the mass spectrometer.
US09281157B2
A radiation generating apparatus includes a cathode array including a plurality of electron emitting portions, and an anode array including a plurality of targets and a chained connection unit that connects the targets. The chained connection unit includes a plurality of shielding members and a thermal transfer member, the shielding members being arranged at locations corresponding to the locations of the respective targets, and the thermal transfer member having a thermal conductivity higher than a thermal conductivity of the shielding members. The thermal transfer member has a portion that is continuous in a direction in which the targets are arranged.
US09281138B2
A movable contact assembly for use with a transfer switch, the moveable contact assembly comprising a center portion, a first conductor portion extending from the center portion, the first conductor portion comprising a first arm comprising two longitudinal extending fingers; and a second conductor portion extending from the center portion, the second conductor portion comprising a second arm comprising two longitudinally extending fingers. The moveable contact assembly may be pivoted about the center portion from a first position to a second position. In the first position, the two longitudinally extending fingers of the first conductor portion resides in a conductive state with a blade connector of a first stationary contact assembly and in the second position, the two longitudinally extending fingers of the second conductor portion resides in a conductive state with a blade connector of a second stationary contact assembly.
US09281135B2
A nitrogen-containing carbon porous material, which has a nitrogen content of 0.5 to 30 mass %, and which has a specific surface area of 200 to 3,000 m2/g.
US09281134B2
A power storage device which can have an improved performance such as higher discharge capacity and in which deterioration due to peeling of an active material layer or the like is difficult to occur, and a method for manufacturing the power storage device are provided. The power storage device includes a current collector, a mixed layer formed over the current collector, and a crystalline silicon layer which is formed over the mixed layer and functions as an active material layer. The crystalline silicon layer includes a crystalline silicon region and a whisker-like crystalline silicon region including a plurality of protrusions projecting over the crystalline silicon region. The whisker-like crystalline silicon region includes a protrusion having a bending or branching portion.
US09281130B2
The invention provides an electrolytic solution for an aluminum electrolyte capacitor with which there is little deterioration of the electrolytic solution properties, the sparking voltage is high, and shorting does not occur, even when the voltage used is high. The invention also provides an electrolyte (C) formed from anions of at least one phosphoric acid alkyl ester (A) and amidinium cations (B), at least one boric acid compound (F) selected from the group consisting of boric acid and boric acid esters, a C2-15 carboxylic acid (D) formed from carbon atoms, oxygen atoms, and hydrogen atoms only, and an organic solvent (E).
US09281128B2
A switchable capacitor having: a dielectric; a pair of electrodes, a first one of the electrodes having the dielectric thereon and a second, flexible one of the electrodes being suspended over the dielectric when the switchable capacitor is in an de-activated state; and top plate disposed between the dielectric and the second, flexible electrode and connected to a reference potential. When the switchable capacitor is electrostatically driven to an activated state, the second one of the electrodes contacts the top plate and when the switchable capacitor is returned to the de-activated state, charge on the top plate is discharged to the reference potential.
US09281126B2
There is provided a multilayer ceramic capacitor including a ceramic body including a plurality of dielectric layers and having first and second main surfaces, first and second side surfaces, and first and second end surfaces, a capacitor part formed in the ceramic body and including a first internal electrode exposed to the first and second end surfaces and a second internal electrode having a lead-out portion exposed to the first main surface, an internal connection conductor formed in the ceramic body and exposed to the first and second main surfaces, and first to fourth external electrodes formed on outer surfaces of the ceramic body and electrically connected to the first and second internal electrodes and the internal connection conductor, wherein the internal connection conductor is connected to the capacitor part in series.
US09281122B2
An electrode structure of a laminated metallization film capacitor includes at least two laminated metallization films. Each metallization film is further disposed with a plurality of metal-uncoated curved gap strips with a certain width on the plane of section of the laminated metallization film capacitor core to separate two adjacent metal coating units partially or totally. A center of the curved gas strip is concaved with a notch. Both sides of the notch form like misaligned shoulders. A projection forms opposite to the open of the notch; in two adjacent curve gap strips. An extreme point of the projection of one curve gap strip is disposed inside the notch of the other one in any event.
US09281108B2
A clamp assembly comprises a first clamp including a plurality of magnet devices. Each magnet device includes a permanent magnet and a coil surrounding the permanent magnet. The clamp assembly further comprises a controller for pulsing the coils to selectively magnetize and demagnetize the permanent magnets.
US09281106B2
A material for anisotropic magnet, comprising, (1) a Pr-T-B—Ga-based composition containing Pr: 12.5 to 15.0 atomic percent, B: 4.5 to 6.5 atomic percent, Ga: 0.1 to 0.7 atomic percent, and the balance of T and inevitable impurities, wherein T is Fe or obtained by substituting Co for a portion of the Fe; and having, (2) a degree of magnetic alignment of 0.92 or more, wherein the degree of magnetic alignment is defined by remanence (Br)/saturation magnetization (Js); and (3) a crystal grain diameter of 1 μm or less.
US09281101B2
An electric wire with a terminal may include an insulated electric wire that may include an insulating coating of polyolefin based resin, an adhesive layer that may be formed over an entire circumference of a surface of the insulating coating, and a waterproofing resin portion that may be formed by insert molding. The waterproofing resin portion may cover a region between the adhesive layer of the insulated electric wire and a portion where the metal terminal is connected to a core wire. The adhesive layer may include a composition of a copolymer of ethylene and glycidyl methacrylate and a phenol based curing agent. The waterproofing resin portion may include aromatic nylon.
US09281095B2
For the purpose of producing an alumina composite in which the integrity between alumina and an inorganic material is further improved, a dispersion liquid preparation step, a solidification step and a burning step are performed, wherein the dispersion liquid preparation step comprises preparing a dispersion liquid in which an inorganic material such as a carbon material is homogeneously dispersed in an alumina raw material solution having an organic additive dissolved therein, the solidification step comprises drying the dispersion liquid to produce a solid raw material, and burning step comprises burning the solid raw material in a non-acidic atmosphere while contacting hydrogen chloride with the solid raw material. In this manner, an alumina composite can be produced, in which at least a portion of an inorganic material such as a carbon material is embedded in the inside of each of α-alumina single crystal particles the constitute alumina particles.
US09281089B2
A method and apparatus for using a parent radionuclide. The apparatus includes a radiation impervious case, a vial disposed within the case, a stopper with a central bore, the central bore aligned at an oblique angle with respect to the case so that a straight line through the central bore does not pass through any part of the vial and a curved tube that connects the central bore of the stopper and a cap of the vial.
US09281087B2
A mobile boration system (60) has a number of components that are mobile and include a water source (10), H2BO3 powder supply (14), a mixer to mix the solution (20) capable of providing a boric acid solution (30) with minimal air entrainment and optional heat exchanger(s) (12), and wherein the system (60) is capable of transport to a nuclear power plant facility by land, sea or air, rather than being in place in a large vulnerable footprint.
US09281084B2
A motor stand of a primary motor-driven pump unit of a pressurized water nuclear reactor comprises an upper flange and fixing means suited to ensure the fixing of transverse holding means of the said primary motor-driven pump unit, the said primary motor-driven pump unit comprising an electric motor having a lower flange suited to be integrated with the said upper flange of the said motor stand. The motor stand is characterized in that the said fixing means comprise an annular element resting on the said upper flange of the said motor stand suited to be flanged between the said upper flange of the said motor stand and the said lower flange of the said motor, the said fixing means comprising at least one radial excrescence in which there is arranged a space suited to receive the said holding means.
US09281083B2
A traveling wave nuclear fission reactor, fuel assembly, and a method of controlling burnup therein. In a traveling wave nuclear fission reactor, a nuclear fission reactor fuel assembly comprises a plurality of nuclear fission fuel rods that are exposed to a deflagration wave burnfront that, in turn, travels through the fuel rods. The excess reactivity is controlled by a plurality of movable neutron absorber structures that are selectively inserted into and withdrawn from the fuel assembly in order to control the excess reactivity and thus the location, speed and shape of the burnfront. Controlling location, speed and shape of the burnfront manages neutron fluence seen by fuel assembly structural materials in order to reduce risk of temperature and irradiation damage to the structural materials.
US09281081B1
A semiconductor apparatus includes first and second address buffer groups. The first address buffer group receives first address signals from an external source and outputs the first address signals to a first internal circuit, in first and second operation modes. The second address buffer group receives second address signals from the external source and outputs the second address signals to the first internal circuit, in the first operation mode, and receives third address signals which are generated in a second internal circuit and outputs the third address signals to the first internal circuit, in the second operation mode.
US09281080B2
A system for testing a device under test (DUT) includes a test controller unit that includes a first memory operable to store a data pattern; a bridge circuit that includes a second memory that is smaller than the first memory, and a functional unit that includes a third memory that is smaller than the second memory. Portions of the data pattern are selectively transferred from the first memory to the second memory during and for DUT testing operations. The functional circuit interfaces with the DUT for testing. Portions of the data pattern are selectively transferred from the second memory to the third memory for application to the DUT.
US09281077B2
A shift register includes series-connection circuits to transmit a shift pulse. The series-connection circuits include a continuous stage group with continuous stages. Each stage of the continuous stage group includes a first output transistor, a first capacitor, an input gate, a first switching element, a second switching element, a third switching element, and a fourth switching element.
US09281076B2
A semiconductor device has an antifuse element and a measurement unit. The antifuse element stores information according to whether the antifuse element is in the broken or unbroken state. The measurement unit determines a resistance value related to the resistance value of the broken antifuse element.
US09281070B2
An erase method of a nonvolatile memory includes supplying an erase voltage to a substrate, supplying a selection word line voltage to word lines connected with a selected sub-block within a memory block of the nonvolatile memory, supplying a non-selection word line voltage to word lines connected with an unselected sub-block within the memory block during a first delay time from a point of time when the erase voltage is supplied, and thereafter floating the word lines connected with the unselected sub-block.
US09281069B2
In method of programming a nonvolatile memory device including a plurality of multi-level cells that store multi-bit data according to example embodiments, a least significant bit (LSB) program operation is performed to program LSBs of the multi-bit data in the plurality of multi-level cells. A most significant bit (MSB) program operation is performed to program MSBs of the multi-bit data in the plurality of multi-level cells. To perform the MSB program, an MSB pre-program operation is performed on first multi-level cells, from among the plurality of multi-level cells, that are to be programmed to a highest target program state among a plurality of target program states, and an MSB main program operation is performed to program the plurality of multi-level cells to the plurality of target program states corresponding to the multi-bit data.
US09281068B2
A method of reprogramming a nonvolatile memory device, comprising setting up bit lines of selected memory cells according to logic values of first and second latches of a page buffer connected to the bit lines, supplying a program pulse to the selected memory cells, performing a program verify operation on the selected memory cells using the first and second latches, and performing a predictive program operation on the selected memory cells according to a result of the program verify operation. In the predictive program operation, bit lines of the selected memory cells are setup according to a logic value of a third latch of the page buffer that corresponds to each of the selected memory cells.
US09281067B1
A semiconductor test system includes a nonvolatile memory and a test device. The nonvolatile memory is configured to include an information region. The test device is configured to include a pin memory and a pin memory controller. The pin memory controller is configured to separate information data into a plurality of information data groups, sequentially transmit the separated plurality of information data groups to the pin memory, sequentially transmit the transmitted plurality of information data group in the pin memory to the nonvolatile memory, and program the transmitted plurality of information data group in the nonvolatile memory into the information region.
US09281052B2
Disclosed herein is a semiconductor device that includes: a frequency dividing circuit dividing a frequency of a first clock signal to generate second clock signals that are different in phase from one another; a multiplier circuit multiplying the second clock signals to generate a third clock signal; a data input/output terminal; data buses; and a data input/output circuit coupled between the data input/output terminal and the data buses. The data input/output circuit includes a data output circuit and a data input circuit. The data output circuit outputs read data supplied in parallel from the data buses to the data input/output terminal in serial in synchronism with the third clock signal. The data input circuit outputs write data supplied in serial from the data input/output terminal to the data buses in parallel in synchronism with a predetermined one of the second clock signals.
US09281051B2
A semiconductor package may include a first die and a second die disposed adjacent to the first die. The semiconductor package may include a plurality of pads configured for receiving and outputting data mask addresses. The semiconductor package may include mapping blocks configured to map data mask signals among the first die, the second die, and the plurality of pads in response to a received address.
US09281049B1
Systems, devices, and circuits for source-synchronous memory interfaces are disclosed. For example, a device includes a first NAND gate with an input for receiving a serial mode enable signal. In addition, the device also includes a second NAND gate with an input for receiving a forwarded strobe signal and an input for receiving an output of the first NAND gate. The device also includes a third NAND gate with an input for receiving a data strobe signal, and an XNOR gate with an input for receiving an output of the second NAND gate and an input for receiving an output of the third NAND gate.
US09281048B2
A semiconductor memory device that includes a command decoder, a refresh controller, an oscillator and a delay unit. The command decoder generates a self refresh command, and the oscillator generates an oscillation signal. The refresh controller generates a refresh control signal and a recovery signal in response to the self refresh command and the oscillation signal. The delay unit transitions internal nodes included in the delay unit that are not transitioned during a refresh period in response to the refresh control signal and the recovery signal.
US09281046B2
A data processor includes a memory accessing agent and a memory controller. The memory accessing agent generates a plurality of accesses to a memory. The memory controller is coupled to the memory accessing agent and schedules the plurality of memory accesses in an order based on characteristics of the memory. The characteristics of the memory include a row cycle page time (tRCPAGE) indicative of an acceptable number of activate commands to a row in the memory within a predetermined time window.
US09281045B1
A first data access request to a first row of a first memory array of the DRAM is received while a refresh operation in the first memory array is executing. The refresh operation is paused. The first data access request is executed, and simultaneously, the bits of the first row of the first memory array, including any updates indicated in the first data access request, are latched to a transfer register. The bits latched to the transfer register are written to a corresponding first row in a second memory array of the DRAM. A bank select logic is updated to indicate that subsequent data access requests to the first row in the first memory array will be executed from the second memory array. The refresh operation is then resumed.
US09281039B2
An apparatus includes a group of data cells and a reference cell coupled to the group of data cells. The reference cell includes four magnetic tunnel junction (MTJ) cells.
US09281022B2
Methods, devices, arrays and systems for reducing standby power for a floating body memory array. One method includes counting bits of data before data enters the array, wherein the counting includes counting at least one of: a total number of bits at state 1 and a total number of all bits; a total number of bits at state 0 and the total number of all bits; or the total number of bits at state 1 and the total number of bits at state 0. This method further includes detecting whether the total number of bits at state 1 is greater than the total number of bits at state 0; setting an inversion bit when the total number of bits at state 1 is greater than the total number of bits at state 0; and inverting contents of all the bits of data before writing the bits of data to the memory array when the inversion bit has been set.
US09281016B2
According to an embodiment, a semiconductor memory device comprises: a semiconductor substrate; a memory cell array configured having a plurality of memory units, each of the memory units including a plurality of memory cells connected in series, the plurality of memory cells being stacked, the plurality of memory units involving a first memory unit and a second memory unit; and a plurality of bit lines connected to ends of each of the memory units in the memory cell array. The first memory unit and the second memory unit are arranged in a staggered manner by the first memory unit being displaced in a row direction with respect to the second memory unit by an amount less than an arrangement pitch in a row direction of the first memory unit or the second memory unit.
US09281014B2
An image processing apparatus according to an embodiment includes: an interface configured to obtain management information that has been generated along with movie data generated; and a controller configured to generate, as a representative picture representing the movie data, image information including characters or an icon to be determined by reference to the management information. When selected by a user, the representative picture is presented on a display device in order to start playing back movie data represented by the representative picture.
US09281013B2
A method provide a selection option to the at least one portable device, the selection option relating to selection of the first audio content and retrieving a selection from the at least one portable device based on the selection option. The method further retrieves a selection of the second audio content and synchronizing the first audio content, the second audio content, and the video content by embedding a synchronizing signal in the first audio content, the second audio content, and the video content. The method further outputs the second audio content and the video content to an output device according to the synchronizing signal. Responsive to the selection of the first audio content, the first audio content with the embedded synchronizing signal is transmitted to the least one portable device, wherein the at least one portable device outputs the first audio content according to the synchronizing signal.
US09280995B2
Described embodiments provide a magnetic mass storage device with a system clock phase-locked to servo address marks on the magnetic disk. A head sequentially reads multiple adjacent servo address marks in a spiral track of servo address marks. When a servo address mark detector detects a mark, the count value of a counter driven by the system clock is sampled and held by a latch. A system clock synthesizer calculates differences in value between successively sampled count values from the latch, averages the differences in value to create an average difference value, and normalizes a difference between the average difference value and a target value to create a phase error value. The phase of the system clock is updated using the phase error value.
US09280989B2
An apparatus having at least an air bearing surface (ABS), the apparatus including a near field transducer (NFT) positioned adjacent the ABS of the apparatus, wherein the NFT includes a plasmonic material; and not greater than about 200 ppm of one or more microalloy dopants.
US09280986B2
Provided is an acoustic signal processing device for producing an output sound meeting listener's preferences by adjusting attack sound, reverberation, and noise component. The device includes: an FFT section for transforming an input audio signal from a time-domain to a frequency-domain to calculate a frequency spectrum signal and for generating a first amplitude spectrum signal and a phase spectrum signal; an attack component controller (10) for controlling an attack component of the first amplitude spectrum signal to generate a second amplitude spectrum signal; a reverberation component controller (20) for controlling a reverberation component of the first amplitude spectrum signal to generate a third amplitude spectrum signal; a first adding section (40) for synthesizing the first amplitude spectrum signal, the second amplitude spectrum signal, and the third amplitude spectrum signal to generate a fourth amplitude spectrum signal; and an IFFT section for generating an audio signal transformed from a frequency domain to a time domain based on the fourth amplitude spectrum signal and the phase spectrum signal generated by the FFT section.
US09280985B2
A noise suppression apparatus selectively uses an adaptive beamformer and fixed beamformer for each frequency. A direction of a null of the fixed beamformer is determined from a direction of a null automatically formed by the adaptive beamformer. Filter coefficients of the adaptive beamformer based on an output power minimization rule are calculated by a minimum norm method using a norm of the filter coefficients as a constraint. The above selection is made based on, for example, a depth of a null automatically formed by the adaptive beamformer in the selection.
US09280982B1
A method for estimating acoustic noise in an environment where a mobile communication device is operating and where the acoustic noise includes nonstationary noise or speech-like noises, and wherein the environment also includes speech signals. The method includes searching for a local minimum energy over a plurality of frames using at least two reference signals including a first signal comprised of a time-sensitive current local minimum energy estimate, emin, and a second signal comprised of a time-weighted average of previous detected local energy minima, eminmean; and deciding whether the detected local energy minima of the second reference signal is a noise signal. Also, binning the detected input signal energy minima values within a plurality of histograms; and calculating a composite noise energy estimate comprised of a weighted sum of a maximum probability noise energy estimate and an expected value noise energy estimate. As such a nonstationary noise estimator is formed.
US09280973B1
In a content browsing environment, a system analyzes content to identify audio commands to be made available to users. The audio commands may be chosen so that they are easily differentiable from each other when using machine-based speech recognition techniques. When the content is displayed, the system monitors a user's speech to detect user utterances corresponding to the audio commands and performs content navigation in response to the user utterances.
US09280970B1
A language processing system uses a lattice parser that semantically parses a command input represented by a lattice. The parser receives a hypotheses space of outputs as encoded in a lattice. Annotations of the input are projected back into the lattice and then lattice parsing is performed to rectify with the annotations. Parsing rules are applied to path fragments in the lattice. The rules that successfully parse from the start node to the end node of the lattice are used to determine whether the command input sentence invokes a specific action, and if so, what arguments are to be passed to the invocation of the action.
US09280969B2
Techniques and systems for training an acoustic model are described. In an embodiment, a technique for training an acoustic model includes dividing a corpus of training data that includes transcription errors into N parts, and on each part, decoding an utterance with an incremental acoustic model and an incremental language model to produce a decoded transcription. The technique may further include inserting silence between a pair of words into the decoded transcription and aligning an original transcription corresponding to the utterance with the decoded transcription according to time for each part. The technique may further include selecting a segment from the utterance having at least Q contiguous matching aligned words, and training the incremental acoustic model with the selected segment. The trained incremental acoustic model may then be used on a subsequent part of the training data. Other embodiments are described and claimed.
US09280968B2
A system and method for processing speech includes receiving a first information stream associated with speech, the first information stream comprising micro-modulation features and receiving a second information stream associated with the speech, the second information stream comprising features. The method includes combining, via a non-linear multilayer perceptron, the first information stream and the second information stream to yield a third information stream. The system performs automatic speech recognition on the third information stream. The third information stream can also be used for training HMMs.
US09280963B1
A pad for generating rhythmic sound waves according to an embodiment of the present disclosure comprises: at least two first patterns configured to generate a first sound wave in response to friction; and at least two second patterns configured to generate a second sound wave in response to the friction, wherein each of the first patterns is spaced and positioned in a constant distance, the at least two second patterns are positioned between the spaced first patterns, and for each of specific directions between the spaced first patterns, the first patterns and the second patterns are spaced and positioned in a different distance.
US09280960B1
A device is configured to display images of sheet music or electronic sheet music. The device may generate and display an index including markers, locations of markers and series of notes associated with the markers. The device may link directly to a particular image of the sheet music or a particular location in the electronic sheet music using the index. The device may identify musical symbols displayed in the sheet music and generate electronic musical symbols associated with the musical symbols. The device may modify the electronic musical symbols and display the modified electronic musical symbols superimposed over the images of sheet music. The device may generate and output audio using the electronic musical symbols. The device may detect a series of pitches and display the sheet music or electronic sheet music based on a most recent pitch in the series of pitches.
US09280959B2
The present invention is directed to an apparatus providing a removable playing surface to a percussion instrument. The apparatus includes a mount assembly for fixing the apparatus to the percussion instrument and a paddle providing a playing surface. The paddle can movable between a playing position over the head of the percussion instrument and in a non-playing position away from the head of the percussion instrument.
US09280957B1
A practice system for a stringed instrument is disclosed. The practice system includes a rigid body having proximal end unto which one or more tuning pegs are disposed for attaching a first end of a cord, and a distal end until which a first rigid plate is disposed having one or more apertures therein configured for attaching a second end of said cord. The practice system further includes a second rigid plate fixedly attached to said proximal end having a first slot therein, and a second slot substantially matching said first slot disposed in said first rigid plate, wherein said first and said second slots cooperate to allow said practice system to be worn on a person by passing a fastening device therethrough.
US09280956B2
Systems and methods are described including creating a mask that indicates which pixel groups do not need to be loaded from Graphics Memory (GMEM). The mask indicates a pixel group does not need to be loaded from GMEM. The systems and methods may further include rendering a tile on a screen. This may include loading the GMEM based on the indication from the mask and skipping a load from the GMEM based on the indication from the mask.
US09280949B2
Displaying colors in a color selection interface is disclosed. Displaying includes identifying a first plurality of colors associated with a color selection interface, mapping each color in the first plurality of colors to an allowed color in an allowed color set of one or more colors to obtain a second plurality of colors, wherein mapping is performed based at least in part on a color lookup table, and visually displaying the second plurality of colors in the color selection interface, wherein the color selection interface is configured to receive a color selection from the second plurality of colors.
US09280942B2
An electro-optical device is configured to be capable of using a region of a gate line drive circuit efficiently and preventing rising speed of a gate line selection signal from decreasing (rising delay), and a shift register circuit is composed of a single conductivity type transistor which is suitable for the device. The gate line drive circuit including an odd driver to drive odd rows of a plurality of gate lines, and an even driver to drive even rows thereof. Each unit shift register in the odd and even drivers receives a selection signal in the second previous row and activates its own selection signal two horizontal periods later. A start pulse of the even driver is delayed in phase by one horizontal period with respect to a start pulse of the odd driver.
US09280938B2
In embodiments of mixed sequential color display, a light source sequentially generates different colors of light in a timed sequence. A display panel is implemented with multiple sub-pixel combinations, where each pixel of the display panel is a combination of sub-pixels that emit a color based on a color of the light that illuminates a sub-pixel combination. The emitted color from a sub-pixel combination is generated as a product of the color of the light and a combination of sub-pixel colors (to include clear and/or colored sub-pixels). The clear and/or different colored sub-pixels in a sub-pixel combination are a spatial aspect of the emitted color, and the sequentially generated different colors of light are a temporal aspect of the emitted color. The pixel combination and the light source together enhance the luminescence of the emitted color over the chrominescence of the emitted color.
US09280932B2
An organic light emitting diode (OLED) display and a method for driving the same, which can display an image with more uniform luminance is disclosed. In one aspect, the OLED display includes a plurality of pixels arranged in a matrix of a plurality of rows and a plurality of columns; a data driver supplying second data signals corresponding to a second data obtained by converting a first data, in response to first data signals corresponding to the first data or a data control signal; and a compensator converting output currents output from the pixels, corresponding to the first data signals into a output voltages, and supplying, to the data driver, the data control signal for converting the first data into the second data, corresponding to the output voltages and the first data based on the output voltages and the first data.
US09280926B2
A control board in a display device includes terminals and a control circuit. The control circuit is configured to output a control signal an image signal through the terminals and to generate a drive voltage in response to a feedback signal, which is fed back to a second terminal of the terminals when a source voltage is applied to a first terminal of the terminals.
US09280924B2
A display device that adopts a field sequential method and that is capable of achieving desired luminance while suppressing mixing of colors is provided. With respect to display of each color by a liquid crystal display device adopting a field sequential method, a period is provided for which light sources of each color remain turned on until a turning-off delay time has elapsed since an end timing of a subframe period. The turning-off delay time relating to LEDs for which an off state begins in a preceding subframe period is configured in such a way as to be shorter than a turning-on delay time relating to LEDs for which an on state begins in a succeeding subframe period. As a result, an all-off period, in which LEDs of all colors are in the off state, is provided between on periods of two colors.
US09280914B2
The present invention discloses a vision-aided hearing assisting device, which includes a display device, a microphone and a processing unit. The processing unit includes a receiving module, a message generating module and a display driving module. The processing unit is electrically connected to the display device and the microphone. The receiving module receives a surrounding sound signal, which is generated by the microphone. The message generating module analyzes the surrounding sound signal according to a present-scenario mode to generate a related message related with the surrounding sound signal. The display driving module drives the display device to display the related message.
US09280904B2
Methods, systems, and computer readable media are disclosed for direct arming aircraft runway approach guidance modes, for example and without limitation, for aircraft operational. In some aspects, a method for directly arming a runway approach guidance mode of an aircraft includes displaying on a display unit an airport, selecting the airport and selecting an active runway for final approach, displaying an path toward the selected final approach runway, selecting the final approach runway, displaying on the display unit at least one symbol associated with at least one runway approach guidance mode, and arming at least one of the at least one runway approach guidance mode.
US09280896B2
A law enforcement fleet multiplier device including a law enforcement vehicle silhouette may include a plurality of sections connected to one another and connectors to connect each of the plurality of sections to a surface. The device may also include a control module carried by one of the plurality of sections and a light array carried by an upper portion of at least one of the plurality of sections and in communication with the control module. The device may further include a power supply carried by one of the plurality of sections and in communication with the control module and a sensor carried by one of the plurality of sections and in communication with the control module. The light array and the sensor may be remotely operable based on a sensed condition, and/or responsive to user defined conditions.
US09280892B2
Concepts and technologies are disclosed herein for disrupting bone conduction signals. According to one aspect, a device can receive a signal via a communication path that is external to a body of a user associated with the device. The device can generate a disruption signal to disrupt the signal. The device can send the disruption signal through the body of the user to disrupt the signal.
US09280874B2
Various embodiments of the present disclosure are directed to a gaming system and method providing a game employing a player-selected one of a plurality of different features. In one embodiment, the gaming system is configured to operate a game associated with a set of a plurality of different features, and enables a player to select one of the features for a play of the game. In certain instances, the gaming system provides the play of the game in accordance with the selected feature. In other instances, the gaming system provides the play of the game without the selected feature, and uses the selected feature to modify one of the other, non-selected features that has a designated relationship with the selected feature. The gaming system subsequently enables the player to select the modified feature for a subsequent play of the game.
US09280871B2
Techniques for providing authentication functionality in a gaming system are disclosed. In one aspect, a gaming system is configured such that, at a given point during a current session of a game in progress that involves at least one user previously granted access by the system to participate in the current session, information available from an authentication token associated with the user is obtained prior to allowing the user to take a particular action in the game. A determination is made as to whether or not the user will be allowed to take the particular action in the game, based on the obtained information. The obtained information may comprise, for example, at least a portion of a one-time password generated by a hardware or software authentication token.
US09280865B2
Systems and methods for identifying defects in a roulette wheel are described. A first trajectory of a roulette ball may be determined after launch of the roulette ball by capturing movement of the roulette ball on the roulette wheel. The roulette wheel has a region where the roulette ball orbits and spins around before the roulette ball falls into a roulette number pocket. The determining step may be repeated to determine additional trajectories, and a plurality of areas that the roulette ball avoided during travel along the trajectories may be identified. A graphical representation of the plurality of avoided areas may be generated to identify regions of the roulette wheel that include defects.
US09280857B2
A dynamic uploading protocol comprises an input interface configured to receive a manifest comprising a plurality of events which may be uploaded; wherein the manifest additionally comprises sensor information relating to each of the plurality of events. The system for a dynamic uploading protocol additionally comprises a processor configured to determine whether to upload additional information about each event, wherein determining whether to upload additional information about each event is based at least in part on the sensor information and contextual information. The system for a dynamic uploading protocol additionally comprises an output interface configured to request the additional information. The system for a dynamic uploading protocol additionally comprises a memory coupled to the processor and configured to provide the processor with instructions.
US09280850B2
A system, method, and computer program product for automatically combining computer-generated imagery with real-world imagery in a portable electronic device by retrieving, manipulating, and sharing relevant stored videos, preferably in real time. A video is captured with a hand-held device and stored. Metadata including the camera's physical location and orientation is appended to a data stream, along with user input. The server analyzes the data stream and further annotates the metadata, producing a searchable library of videos and metadata. Later, when a camera user generates a new data stream, the linked server analyzes it, identifies relevant material from the library, retrieves the material and tagged information, adjusts it for proper orientation, then renders and superimposes it onto the current camera view so the user views an augmented reality.
US09280847B2
There is provided an image retrieval method including obtaining a parallax that exists in a material image which is viewed as an object in a three-dimensional manner, retrieving a three-dimensional image that satisfies a predetermined condition as a selectable candidate image from a plurality of three-dimensional images, each of which is viewed in a three-dimensional manner, and executing image composition by superposing the material image on the three-dimensional image that is retrieved as the selectable candidate image in the retrieving of the three-dimensional image.
US09280846B2
A method for performing occlusion queries is disclosed. The method includes steps of: (a) a graphics processing unit (GPU) using a first depth buffer of a first frame to thereby predict a second depth buffer of a second frame; and (b) the GPU performing occlusion queries for the second frame by using the predicted second depth buffer, wherein the first frame is a frame predating the second frame. In accordance with the present invention, a configuration for classifying the objects into the occluders and the occludees is not required and the occlusion queries for the predicted second frame are acquired in advance at the last of the first frame or the first of the second frame.
US09280835B2
The disclosure relates to encoding and decoding image information. The encoding comprises receiving a block of pixels; determining a set of potential reference samples for the block of pixels; selecting a subset of the set of potential reference samples to be used as reference samples for the block of pixels; and using the selected reference samples to determine a DC prediction value for the block of pixels. A prediction error is determined for a pixel in the block of pixels on the basis of the DC prediction value. The decoding comprises receiving an encoded block of pixels; determining reference samples for the encoded block of pixels; and using the determined reference samples to define a DC prediction value for the block of pixels. A prediction error is received for a pixel of the encoded block of pixels. The pixel value is reconstructed on the basis of the DC prediction value.
US09280830B2
An image processing apparatus for extracting an area of a detection target from an image includes an image input section that acquires an image, an image generation section that generates a plurality of images with different resolutions from the image, and a segmentation section that performs segmentation using the plurality of images with the different resolutions. The segmentation section segments an image with a low resolution and then segmenting an image with a high resolution using, as a processing target area, an area in the image with the high resolution corresponding to an area near a boundary resulting from processing of the segmentation of the image with the low resolution.
US09280829B1
Technologies are described herein for using linear functions to calculate depth information for scenes illuminated with structured light. Instead of performing matrix operations to determine depth information for each dot of light projected onto a scene, the depth information associated with each projected dot is calculated of light using a linear function.
US09280819B2
Methods for image segmentation are provided herein. A method includes creating an anatomical model from training data comprising one or more imaging modalities, generating one or more simulated images in a target modality based on the anatomical model and one or more principles of physics pertaining to image contrast generation, and comparing the one or more simulated images to an unlabeled input image of a given imaging modality to determine a simulated image of the one or more simulated images to represent the unlabeled input image.
US09280790B2
A trading interface is provided for displaying market data related to a tradeable object being traded at an electronic exchange. According to one example embodiment, market data related to a tradeable object is displayed in relation to a value axis, such as a price axis. As new market data is received, the displayed market data is updated and may be repositioned so that a trader can view current market conditions in a viewable portion of the interface. The interface also includes a number of market movement indicators that assist a trader in tracking market movement. These viewable references allow a trader to navigate and immediately understand the “real” direction of the market activity despite any underlying adjustment of the viewable area of the trading interface.
US09280784B2
A method for measuring engagement includes presenting a set of stimuli to a set of subjects, capturing neural data from the subjects, calculating a set of neural similarities between the first set of subjects, and generating a measure of engagement from the set of neural similarities.
US09280776B2
The present invention extends to methods, systems, and computer program products for delivering content based on physical object characteristics. When a physical object is detected within a specified proximity of a component of a computer system, the computer system submits an accessed object identifier for the physical object to a content portal. The content portal identifies content and corresponding layout information for the computer system by at least determining the commonality between object keywords for the physical object and target keywords for content providers and determining content placement priorities corresponding to content providers. The content portal sends the content and layout information to the computer system. The computer system filters a subset of content from the received and presents the filtered subset of content on a presentation surface in accordance with corresponding layout information.
US09280775B2
A server is operable to receive a media device identifying number (ID) and establish an association between a media device and a payment account and, in one embodiment, supports at least one of payment authorization and payment clearing based at least in part on the media device ID and the payment account. A network and system includes a payment card processor server that is operable to receive a payment authorization request and to determine if an authorized media device generated a purchase selection message and to determine to approve a received payment authorization request based, in part, if the media device was authorized for the purchase selection based upon a received media device ID. The system is further operable to perform a key rotation to protect payment account information.
US09280774B1
According to one embodiment, an apparatus comprising a memory and a processor is provided. The memory is operable to store information associated with a user account. The processor can receive a message indicating that a transaction associated with a card has occurred and receive a first input indicating that the transaction is fraudulent. The processor can receive a second input indicating that a report should be filed and present, on a display, a plurality of questions to determine whether the card has been stolen. The processor can receive a third input indicating an answer to each of the plurality of questions and present, on the display, an affidavit. The processor can receive a fourth input indicating the affidavit has been electronically signed and present, on the display, a confirmation message indicating that the report has been filed.
US09280771B2
A method, programmed medium and system are provided for implementing a prebuilt and encrypted personal identification information (PII) profile which resides only on a user's computer and is prevented from being permanently stored in a server's database. When a user visits a web site and creates a new account, the site submits a request to query the user's profile using an extension to the HTTP protocol. The user is prompted by the user's browser to grant the site permission to do so and the site automatically uploads a non-personal identifying number (ID) to the user's system to create an account. User-selected fields of the PII are transmitted to the server for processing a user-requested transaction. All personal information remains on the user's computer within the user's encrypted PII profile and is deleted at the server after the completion of the requested transaction.
US09280768B2
A transaction system including at least two transaction communicators, at least one of which is a mobile communicator, at least one of the at least two transaction communicators having sequential visually sensible indicia generation functionality operative to generate a time sequence of indicia which provides at least transaction data and at least one of the at least two transaction communicators having sequential visually sensible indicia receiving functionality and transaction data extraction functionality capable of extracting at least the transaction data from the time sequence of particular indicia, whereby a time sequence of indicia which provides at least transaction data is transmitted from one of the at least two transaction communicators to another of the at least two transaction communicators.
US09280762B2
An electric mail processing apparatus includes a communication control unit for receiving a mail from the mail server; a main storage unit for storing the mail; a determining unit for determining process contents of the mail; a process performing unit for performing the process contents on the mail; and a mail deletion instructing unit for sending a deletion instruction to the mail server to delete the mail. The determining unit determines whether a first received mail is a subsequently received mail. The communication control unit deletes the subsequently received mail when the determining unit determines that the first received mail is the subsequently received mail. The communication control unit controls the mail deletion instructing unit to send the deletion instruction to the mail server to delete the subsequently received mail.
US09280743B2
A truth maintenance method and system. The method includes receiving by a computer processor, health event data associated with heath care records for patients. The computer processor associates portions of the health event data with associated patients and related records in a truth maintenance system database. The computer processor derives first health related assumption data and retrieves previous health related assumption data derived from and associated with previous portions of previous health event data. The computer processor executes non monotonic logic with respect to the first health related assumption data and the previous health related assumption data. In response, the computer processor generates and stores updated first updated health related assumption data associated with the first health related assumption data and the previous health related assumption data.
US09280742B1
Methods and systems for suggesting one or more semantic tags for a media clip are disclosed. In one aspect, a media clip provided by a user is identified, and a first set of semantic tags is generated for the media clip based on a feature vector associated with the media clip. The first set of semantic tags is then provided to a classifier that is trained based on user selection of semantic tags. Further, a second set of semantic tags is obtained from the classifier and is suggested to the user for the media clip.
US09280737B2
A system in package (SIP) structure, an electroplating module thereof and a memory storage device are provided. The SIP structure includes a first layout layer, a second layout layer and a rewritable non-volatile memory module. The first layout layer includes a first pad and a wire. The first pad is close to a first side of the first layout layer, and the first pad is configured to couple to a ground voltage. One terminal of the wire is coupled to the first pad, and another terminal of the wire is coupled to an opening of the SIP structure, wherein the opening is located at a second side of the first layout layer opposite to the first side, and the opening is configured to couple to an external voltage.
US09280727B2
A information processing unit includes: a control unit configured to control operation processing of individual units through a user interface; a print set value storage unit configured to store a print set value that is set by operation of an operation unit on a basic setting screen displayed on a display unit on which setting relating to the color printing is performed at a basic level and a print detail set value that is set by operation of the operation unit on a detail setting screen as another dialog on which the setting is performed at a detail level under operation control of the control unit; and a print data creating unit configured to create print data of the color printing based on the print set value and the print detail set value under operation control of the control unit.
US09280724B2
A pose classification apparatus is provided. The apparatus includes a first image analyzer and a second image analyzer configured to estimate a body part for each pixel of an input image including a human body, a body part decider configured to calculate reliabilities of analysis results of the first image analyzer and the second image analyzer, and configured to decide the body part for each pixel of the input image based on the calculated reliabilities, and a pose estimator configured to estimate a pose of the human body included in the input image, based on the decided body part for each pixel.
US09280723B2
The techniques introduced here include a system and method for transcoding multimedia content based on the results of content analysis. The determination of specific transcoding parameters, used for transcoding multimedia content, can be performed by utilizing the results of content analysis of the multimedia content. One of the results of the content analysis is the determination of image type of any images included in the multimedia content. The content analysis uses one or more of several techniques, including analyzing content metadata, examining colors of contiguous pixels in the content, using histogram analysis, using compression distortion analysis, analyzing image edges, or examining user provided inputs. Transcoding the multimedia content can include adapting the content to the constraints in delivery and display, processing and storage of user computing devices.
US09280719B2
Foreground and background image segmentation is described. In an example, a seed region is selected in a foreground portion of an image, and a geodesic distance is calculated from each image element to the seed region. A subset of the image elements having a geodesic distance less than a threshold is determined, and this subset of image elements are labeled as foreground. In another example, an image element from an image showing at least a user, a foreground object in proximity to the user, and a background is applied to trained decision trees to obtain probabilities of the image element representing one of these items, and a corresponding classification assigned to the image element. This is repeated for each image element. Image elements classified as belonging to the user are labeled as foreground, and image elements classified as foreground objects or background are labeled as background.
US09280718B2
A system and method for automating an appropriate voxel prescription in a uniquely definable region of interest (ROI) in a tissue of a patient is provided, such as for purpose of conducting magnetic resonance spectroscopy (MRS) in the ROI. The dimensions and coordinates of a single three dimensional rectilinear volume (voxel) within a single region of interest (ROI) are automatically identified. This is done, in some embodiments by: (1) applying statistically identified ROI search areas within a field of view (FOV); (2) image processing an MRI image to smooth the background and enhance a particular structure useful to define the ROI; (3) identifying a population of pixels that define the particular structure; (4) performing a statistical analysis of the pixel population to fit a 2D model such as an ellipsoid to the population and subsequently fit a rectilinear shape within the model; (5) repetiting elements (1) through (4) using multiple images that encompass the 3D ROI to create a 3D rectilinear shape; (6) a repetition of elements (1) through (5) for multiple ROIs with a common FOV. A manual interface may also be provided, allowing for override to replace by manual prescription, assistance to identify structures (e.g. clicking on disc levels), or modifying the automated voxel (e.g. modify location, shape, or one or more dimensions).
US09280717B2
A method is disclosed for operating a computing device. One or more images of a scene captured by an image capturing device of the computing device is processed. The scene includes an object of interest that is in motion and that has a rounded shape. The one or more images are processed by detecting a rounded object that corresponds to the object of interest. Position information is determined based on a relative position of the rounded object in the one or more images. One or more processes are implemented that utilize the position information determined from the relative position of the rounded object.
US09280714B2
The present invention discloses an identification system which includes an image sensor, a storage unit and a comparing unit. The image sensor captures a plurality of images of the motion trajectory generated by a user at different timings. The storage unit has stored motion vector information of a group of users including or not including the user generating the motion trajectory. The comparing unit compares the plurality of images with the motion vector information to identify the user. The present invention also provides an identification method.
US09280713B2
An apparatus and a method for processing an image mounted in a vehicle include a camera mounted in the vehicle to acquire image data around the vehicle. A controller is configured to analyze the image data to extract at least one light region having an elliptical shape or a closed surface shape formed of a free curve, separates the light region into a point source and reflected light, and then corrects and outputs the image data of a location at which the reflected light is confirmed.
US09280709B2
The present invention relates to an information processing device, an information processing method, and a program capable of easily adding an annotation to content.A feature amount extracting unit 21 extracts an image feature amount of each frame of an image of learning content and extracts word frequency information regarding frequency of appearance of each word in a description text describing a content of the image of the learning content (for example, a text of a caption) as a text feature amount of the description text. A model learning unit 22 learns an annotation model, which is a multi-stream HMM, by using an annotation sequence for annotation, which is a multi-stream including the image feature amount of each frame and the text feature amount. The present invention may be applied when adding the annotation to the content such as a television broadcast program, for example.
US09280706B2
The present disclosure is directed towards methods and systems for capturing images of an iris and a scene using a single image sensor. An image sensor may capture a view of a scene and a view of an iris in at least one image. An image processing module may apply a level of noise reduction to a first portion of the at least one image to produce an image of the scene. The image processing module may apply a reduced level of noise reduction to a second portion of the at least one image to produce an image of the iris for use in biometric identification.
US09280700B2
A method and apparatus for verifying an input signature are provided. The method includes generating signature data based on a real touch event and a proximity touch event that occur on a touch input unit of and apparatus, extracting a feature of the input signature based on the signature data, and determining whether to authenticate the input signature based on a similarity between the feature of the input signature and a corresponding feature of a previously stored reference signature.
US09280682B2
A private information management apparatus, a method, and a program that allows individual users to easily set and apply their privacy rules. A private information management apparatus receives setting data from a user terminal and creates a privacy rule that defines a condition for restricting disclosure of private information and a restriction method. If undisclosed image data contains private information of a user, the private information management apparatus extracts metadata contained in this undisclosed image data, and determines whether or not the metadata satisfies the condition for restricting disclosure of the private information. If it is determined that the condition is satisfied, the private information management apparatus executes the restriction method defined by the privacy rule.
US09280679B2
Methods, systems, and computer-readable media for granting application permissions and providing notifications of API activity are provided. An example method may include processing a request to install an application that requires API calls by the application. The method may further include determining an authoring entity of the application, and determining whether the authoring entity is certified by one or more trusted entities. In addition, the method may include allowing an installation of the application when the authoring entity is certified by at least one trusted entity. An example system may include instructions that, when executed by the one or more processors, cause the one or more processors to process a request to install an application that requires access to one or more APIs, determine a sensitivity level of each of the required APIs, and when the determined sensitivity level of at least one API of the required APIs is associated with a restricted API classification, require that code of the application be delivered using a secure mechanism.
US09280676B2
In accordance with aspects of the disclosure, a system and methods are provided for managing development of business applications. The system and methods may be provided for defining security relevance for data types associated with business objects, defining security rules for the data types associated with the business objects, and defining validation and test fulfillment of the security rules by providing one or more security runtime modules for each security rule defined by the security rules handler to ensure validation and test fulfillment of each security rule.
US09280673B2
Disclosed is an image forming apparatus that connects to a device. The image forming apparatus includes a storage unit that stores, for each types of page description languages for describing printing data, permission information indicating whether execution of a control command described in the corresponding page description language is allowed; a receiving unit that receives the control command transmitted from the device; a determination unit that determines whether the execution of the control command is allowed for the image forming apparatus, based on the permission information being stored in the storage unit; and a controller that controls the image forming apparatus. When the execution of the image forming apparatus is disallowed for the image forming apparatus, the controller prevents the image forming apparatus from executing the control command.
US09280665B2
Disclosed are various embodiments for fast and accurate identification of message-based application programming interface (API) calls in Objective-C binaries. An application binary is analyzed to determine a first listing of classes and a first listing of methods. Metadata is extracted from the application to determine a second listing of classes and a second listing of methods. A listing of external classes and a listing of external methods are determined. Data identifying public API definitions is obtained. Public APIs invoked by the application are determined by comparing the external classes and methods with the public API definitions.
US09280662B2
When a computer system process is acting contrary to the rules established for that process for the resource it is running on, the process is moved to a quarantined section and its continued operation is isolated from other processes. While in isolation, the quarantined process is tested and appropriate action, such as, for example, rehabilitation, change of the rules, or termination, is performed. The divided quarantined sections are used for each misbehaving process.
US09280655B2
A method for operating an electronic device is provided. The method includes executing, by a processor of the electronic device operable in a first mode (e.g. a trusted execution environment (TEE)) or a second mode (e.g. a non-trusted execution environment (NTEE)), wherein the first mode is more secure than the second mode; receiving, by the processor operating in the first mode, data or information related to a first software program stored in a first memory region; and authenticating, by the processor operating in the first mode, at least a portion of the data or information using a second software program stored in a second memory region.
US09280653B2
A system and method for employing a mechanism for unlocking a vehicle ECU. The ECU stores a unique ECU identification value that identifies the particular ECU and a secure server stores the ECU identification value and a unique ECU security key value, where the identification value identifies the security key value in the server, and where the secure server stores the unique ECU identification value and the unique security key value for many ECUs. A service tool that wants to gain access to the ECU for software reprogramming or service requests the ECU identification value and a challenge from the ECU and sends them to the secure server, which then identifies the security key value associated with that ECU identification value and the response for the challenge. The secure server then sends the response to the service tool, which provides it to the ECU to unlock it for programming.
US09280652B1
An unlock procedure for an electronic device can be based at least in part upon a determined gaze direction or viewing location of a user. During a device unlock process, the user can be directed to follow an element or path on a display element with the user's eyes. Image information captured of the user during this process can be used to correlate the user's eye position in the image with the corresponding gaze location on the device, in order to calibrate the gaze tracking in a way that is substantially transparent to the user. Further, certain devices can also utilize captured image information during the unlock process to authenticate the user using a process such as iris recognition or retinal scanning. Such an approach enables secure access to the device without requiring the user to manually enter identifying information, and re-authentication can be performed without distracting the user.
US09280649B2
A user detecting apparatus includes: a memory; and a processor that executes a procedure, the procedure including: obtaining a first image and a second image, extracting a user-associated area from the first image according to a given condition, dividing the user-associated area into a plurality of areas, storing a histogram of each of the plurality of areas in the memory, detecting from the second image a corresponding area that corresponds to an area that is one of the plurality of areas and has a first reference histogram according to similarity, and changing a reference histogram used for a third image from the first reference histogram to a second reference histogram.
US09280646B1
Methods, systems, and computer readable mediums for implementing role-based access control (RBAC) are disclosed. According to one method, the method includes authenticating a user for implementing RBAC across multiple components associated with one or more converged infrastructure systems, receiving, from the user, RBAC related information for implementing RBAC across the multiple components associated with the one or more converged infrastructure systems, and implementing, using the RBAC related information, RBAC across the multiple components associated with the one or more converged infrastructure systems.
US09280635B2
Systems in a flow cytometer having an interrogation zone and illumination impinging the interrogation zone include: a lens subsystem including a collimating element that collimates light from the interrogation zone, a light dispersion element that disperses collimated light into a light spectrum, and a focusing lens that focuses the light spectrum onto an array of adjacent detection points; a detector array, including semiconductor detector devices, that collectively detects a full spectral range of input light signals, in which each detector device detects a subset spectral range of the full spectral range of light signals; and a user interface that enables a user to create a set of virtual detector channels by grouping detectors in the detector array, such that each virtual detector channel corresponds to a detector group and has a virtual detector channel range including the sum of subset spectral ranges of the detectors in the corresponding detector group.
US09280625B2
Techniques and systems are described for improving the efficiency of timing calculations in numerical sequential cell sizing and for improving the efficiency of incremental slack margin propagation. Some embodiments cache timing-related information associated with a source driver that drives an input of a sequential cell that is being sized, and/or timing-related information for each output of the sequential cell that is being sized. The cached timing-related information for the source driver can be reused when sizing a different sequential cell. The cached timing-related information for the outputs of the sequential cell can be reused when evaluating alternatives for replacing the sequential cell. Some embodiments incrementally propagate slack margins in a lazy fashion (i.e., only when it is necessary to do so for correctness or accuracy reasons) while sizing gates in the circuit design in a reverse-levelized processing order.
US09280623B2
Disclosed is a system in which in order to obtain the operation parameter of a circuit based on an implementable area indicating a circuit scale that can be implemented on a circuit implementation device, circuit area information, and operation parameter measuring circuit area information, an observation signal number determining means determines observation signal information on a circuit that obtains the operation parameter of the circuit. The number of the extracted signals is determined in view of the area that can be implemented on a digital LSI or an emulator and the area of the circuit to be implemented (refer to FIG. 1).
US09280619B2
Virtual material handling systems can be used to drive the operation of real material handling systems for purposes such as testing and validation of the components of the real material handling systems. The real material handling system, in turn, can provide data regarding system operation which may be fed back to the virtual material handling system to control its function.
US09280618B1
The systems and methods perform simulations in a systematic way as to minimize redundant data fetching and computations and reduce run-time. The systems and methods can cache information that can be used across multiple control strategies and speed up the process of simulation by several orders of magnitude. A business analyst can first generate a set of matching criteria that meets business intuition for the specific initiative and set of stores under analysis. A systematic approach in building similar sites models from control strategies that are combinations of this set of matching criteria can be applied to minimize data extraction and processing. The similarity function allows for the distance of each criterion to be combined linearly. Data for each matching criteria only needs to be extracted once but can be used in all control strategies that uses that criteria.
US09280606B2
Aspects retrieve, organize and display different classifications of sets of search results in different, respective tabbed sheets that are nested on top of one another in a web-based interface dashboard. A text string search query is classified into constituent primary search terms that are likely to return satisfactory search results as indicated by retrieved search history data as a function of search resources and language classification rules associated with the user identity indicia. Secondary search terms related to the primary search terms and including synonyms and antonyms are determined as substitutes for the primary search terms in response to search history indicating follow-up searches immediately subsequent to searches of the primary search terms at less than a specified threshold of frequency. The set of peripheral knowledge article results is generated by searching knowledge article resources for background information on the primary search terms or the secondary search terms.
US09280603B2
Techniques are provided for generating descriptions of matching resources in a manner that takes into account the kind, quality, and relevance of the available sources of information about the matching resources. For example, after the search engine identifies matching resources based on the query terms, the search engine determines the kinds of available sources of information about each matching resource. For each matching resource, based on the kinds of available sources of information about the matching resource, one of a plurality of processes is selected to generate a description for the matching resource. Using the content-sensitive description generation techniques described herein, a single result set may include abstracts that were generated using several different processes, where the difference in process corresponds to a difference in the kind, quality, and relevance of the available sources of information about each matching resource.
US09280595B2
A set of potential search-query terms can be identified based on empirical queries for apps. For each potential search-query term, a subset of documents within a set of documents can be identified based on apps that users were likely to click on or download following entry of a search query with a comparable or same term. One or more other indicator terms can be identified as being related to the potential search-query term based on the one or more second indicator terms being prevalent within the subset of documents. Upon receipt of a subsequent search query, a search can then be performed using both a term within the search query and one or more related other indicator terms.
US09280589B2
Methods and apparatus, including computer program products, are provided for user interfaces. In one aspect, there is provided a method. The method may include generating a virtual desktop including a plurality of objects organized in accordance with at least one of a theme and a structure; providing a navigation pane on the virtual desktop to navigate through the plurality of objects; and providing a controller to enable a multi-level zoom on at least one of the plurality of objects on the virtual desktop. Related systems, methods, and articles of manufacture are also disclosed.
US09280588B2
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for providing search result page previews. In one aspect, a method includes receiving data that specify a set of search results responsive to a search query. Query-relevant content is selected to be included in a page preview for at least one of the search results. In turn, data that cause presentation of the page preview are provided. The data provided can cause presentation of the query-relevant content at an initial zoom level and at a higher zoom level, where the initial zoom level is a zoom level at which both the query-relevant content and other content from the resource are presented. The page preview can include a page tear that defines multiple portions of the page preview for a resource.
US09280571B2
A method performed in a system that has a plurality of volumes stored to storage hardware, the method including generating, for each of the volumes, a respective space saving potential iteratively over time and scheduling space saving operations among the plurality of volumes by analyzing each of the volumes for space saving potential and assigning priority of resources based at least in part on space saving potential.
US09280569B2
Embodiments include a system for matching an element of a source schema to an element of a target schema. The system includes a processing unit and a communication unit. The processing unit may be configured to: identify a sample data item of the element of the target schema; match a part of the sample data item to a part of a sample instance of the source schema; and match the element of the source schema to which the part of the sample instance of the source schema belongs to the element of the target schema. The communication unit may be configured to: provide the sample data item through an interface and receive the sample instance of the source schema.
US09280563B2
A system and method, which may be an offline method, extracts relevant image features about images in a network-based publication system for enabling image similarity searching of such images. An image is uploaded and may be sent to a picture processing service, which generates digests. The digests are compressed data structures each representing a particular image feature such as edge, color, texture, or words. These digests are then stored in a search database, where the digests can be used to retrieve images by image similarity at scale. A similar process can be performed for an image query for searching the search database for images similar to the image.
US09280556B2
A mechanism is provided for generating enumerated information in which a plurality of files is enumerated except entirely-invalidated files on a sequential medium. Management information for managing locations where the plurality of files on the sequential medium are recorded is acquired from the sequential medium. The enumerated information in which the plurality of files are enumerated is generated in an order according to the locations where the plurality of files are recorded on the basis of the acquired management information.
US09280555B1
A technique for protecting host data using, for example, snaps, asynchronous replication, and/or synchronous replication, includes storing both block-based objects and file-based objects in a common form—as files. With both block-based objects and file-based objects represented as the same type of underlying objects, data protection of both block-based and file-based objects is accomplished using a single set of data protection technologies, which are configured to perform data protection operations on files.
US09280554B2
A system, computer implemented method, and computer program product for analyzing an installation to determine a file system promotion path during an online patching cycle. The method commences by identifying an initial file system and a shadow file system, the shadow file system being at least some duration older than the initial run file system, then analyzing a history of events that occurred in or on the installation during the duration to determine a degree of confidence. Based on the degree of confidence, then selecting the initial file system to be used on the online patching cycle when the confidence value is equal or above a threshold, or selecting the shadow file system to be used in the online patching cycle when the confidence value is below a threshold. The history of events is recorded in forms of a patch list, a log file, or a list of configuration events.
US09280553B2
A server is implemented with a modified file open action, which, when a user performs the modified open, initially opens a file without locking the file. When a user indicates (either explicitly or implicitly) that the user is attempting to or intending to open the file, the file can then be locked for editing. In this way, the default action when a user requests a file is to open the file without denying other users access to the file. Then, when the user indicates that editing should occur, the lock for the file is obtained.
US09280552B2
A plurality of workers is configured for parallel processing of deduplicated data entities in a plurality of chunks. The deduplicated data processing rate is regulated using a rate control mechanism. The rate control mechanism incorporates a debt/credit algorithm specifying which of the plurality of workers processing the deduplicated data entities must wait for each of a plurality of calculated required sleep times, the calculated required sleep times being calculated as a best fit between a maximum allowable sleep time, a delta vector, and a limit per time vector, wherein the required sleep time is one of the plurality of calculated required sleep times.
US09280529B2
A computer-implemented collaborative editing method includes receiving input from a user of a browser-based document editing application on a document displayed by the application; identifying a current location in the document for a cursor of a first user executing the application; receiving from a central server system data that reflects changes made to the document by one or more users other than the first user and current positions in the document of cursors for the one or more other user; updating a document model stored on a computing device that is executing the browser-based application and rendering at least a portion of the model to the browser; and rendering the current positions of the cursors for the one or more other users to the browser.
US09280528B2
An example of a method includes determining features of a first type for a web page of a plurality of web pages. The method also includes electronically determining a plurality of rules for an attribute of the first web page, wherein the plurality of rules are determined based on features of the first type. The method also includes electronically identifying a first rule, from the plurality of rules, which satisfies a first predefined criterion. The first predefined criteria include at least one of a first threshold for a precision parameter, a second threshold for a support parameter, a third threshold for a distance parameter and a fourth threshold for a recall parameter. The method further includes storing the first rule to enable extraction of value of the attribute from a second web page.
US09280526B1
A resident mobile application for application and mobile web navigation on a mobile communication device is disclosed herein. The resident mobile application interfaces with a motion sensor of a mobile communication device.
US09280522B2
A system may aggregate highlighting information associated with a document that includes a number of elements. The highlighting information may identify one or more of the elements that have been highlighted by a group of users. The system may determine weight values for the one or more elements, generate information associated with the document based on the weight values, and provide the information.
US09280518B2
According to an embodiment, a computing device includes a receiving unit, a calculating unit, a solving unit, a selecting unit, and a determining unit. The receiving unit is configured to receive pieces of input data indicative of elements of a subgroup of a multiplicative group in a finite field and pieces of first additional data for identifying conjugates of the respective pieces of input data. The elements are represented by traces. The calculating unit is configured to calculate a coefficient of an equation based on the pieces of input data. The solving unit is configured to obtain solutions of the equation. The selecting unit is configured to select one of the solutions as a result of computation, based on the first additional data. The determining unit is configured to determine second additional data for identifying a conjugate of the selected result of computation based on the first additional data.
US09280513B1
Processor-to-processor (P-P) and/or broadcast proxies may be designated in a microprocessor matrix comprising a plurality of mesh-interconnected matrix processors when default processor-to-processor or broadcast routing algorithms used by data switches within the matrix to route messages would not deliver the messages to all intended recipients. The broadcast proxies broadcast messages within individual non-overlapping broadcast domains of the matrix. P-to-P and broadcast proxies may be designated as part of a boot-time testing/initialization sequence. Improving system fault tolerance allows improving semiconductor processing yields, which may be of particular significance in relatively large integrated circuits including large numbers of relatively-complex matrix processors.
US09280506B1
A system and corresponding method for transferring data via an interface assembly is provided. The data is transferred between a USB port of a first device and a media port of a second device. Uncompressed high definition media data may be received from the USB port. The received uncompressed high definition media data may be supplied to a media connector in accordance with a first media standard, such that the supplied data can be transmitted in accordance with the first media standard via the media connector to the media port of the second device. The uncompressed high definition media data may include multimedia data and side-band communication data. A single signal may be encoded and decoded in accordance with a protocol that enables the single signal to communicate all side-band communications to and from the source device via a single pin of a USB connector.
US09280494B2
A method on a computing system for associating an output of a coupled peripheral device to an input of the peripheral device is provided. A computing system configured to be coupled to a peripheral device comprising an input and an associated output is provided. The computing system comprises an input logical layer configured to receive descriptor configuration information from the peripheral device and build interface sets including attributes of the input of the peripheral device and the associated output. The input logical layer uses the interface sets to select and set attributes of the output of the peripheral device.
US09280486B2
A host selects a memory page that has been allocated to a guest for eviction. The host may be a host machine that hosts a plurality of virtual machines. The host accesses a bitmap maintained by the guest to determine a state of a bit in the bitmap associated with the memory page. The host determines whether content of the memory page is to be preserved based on the state of the bit. In response to determining that the content of the memory page is not to be preserved, the host discards the content of the memory page.
US09280485B2
A processor, operable in a computing storage environment, allocates portions of a Scatter Index Table (SIT) disproportionately between a larger portion dedicated for meta data tracks, and a smaller portion dedicated for user data tracks, and processes a storage operation through the disproportionately allocated portions of the SIT using an allocated number of Task Control Blocks (TCB).
US09280484B2
A storage system comprises a cache for caching data blocks and storage devices for storing blocks. A storage operating system may deduplicate sets of redundant blocks on the storage devices based on a deduplication requirement. Blocks in cache are typically deduplicated based on the deduplication on the storage devices. Sets of redundant blocks that have not met the deduplication requirement for storage devices and have not been deduplicated on the storage devices and cache are targeted for further deduplication processing. Sets of redundant blocks may be further deduplicated based on their popularity (number of accesses) in cache. If a set of redundant blocks in cache is determined to have a combined number of accesses being greater than a predetermined threshold number of accesses, the set of redundant blocks is determined to be “popular.” Popular sets of redundant blocks are selected for deduplication in cache and the storage devices.
US09280481B1
In order to optimize efficiency of deserialization, a serialization cache is maintained at an object server. The serialization cache is maintained in conjunction with an object cache and stores serialized forms of objects cached within the object cache. When an inbound request is received, a serialized object received in the request is compared to the serialization cache. If the serialized byte stream is present in the serialization cache, then the equivalent object is retrieved from the object cache, thereby avoiding deserialization of the received serialized object. If the serialized byte stream is not present in the serialization cache, then the serialized byte stream is deserialized, the deserialized object is cached in the object cache, and the serialized object is cached in the serialization cache.
US09280478B2
Methods and structure are provided for rebuilding cache data from a failed cache device based on tracking data for the failed cache device. The system includes a memory and a cache manager. The memory stores tracking data that correlates entries at a cache with logical block addresses of a logical volume. The cache manager is able to determine that a device implementing the cache has failed and to analyze the tracking data to identify logical block addresses correlated with cache entries from the failed cache device. The cache manager is further able to generate new cache entries at a new cache device, and to populate the new cache entries with data from the identified logical block addresses.
US09280476B2
An apparatus may include a first memory, a control circuit, a first address comparator and a second address comparator. The first memory may store a table, which may include an expected address of a next memory access and an offset to increment a value of the expected address. The control circuit may read data at a predicted address in a second memory and store the read data in a cache. The first and second address comparators may determine if a value of a received address is between the value of the expected address and the value of the expected address minus a value of the offset. The control circuit may also modify the value of the offset responsive to determining the value of the received address is between the value of the expected address and the value of the expected address minus the value of the offset.
US09280465B2
A technique of operating a data processing system, includes logging addresses for cache lines modified by a producer core in a data array of a producer cache to create a high-availability (HA) log for the producer core. The technique also includes moving the HA log directly from the producer cache to a consumer cache of a consumer core and moving HA data associated with the addresses of the HA log directly from the producer cache to the consumer cache. The HA log corresponds to a cache line that includes multiple of the addresses. Finally, the technique includes processing, by the consumer core, the HA log and the HA data for the data processing system.
US09280455B2
Provided is a memory control device, including a write control unit that sequentially designates a memory block, a write processing unit that writes write data in the designated memory block, a verifying unit that reads read data from the memory block and verifies whether or not the read data matches the write data for each of a plurality of memory cells, a retry inhibiting unit that inhibits a retry process from being performed in a memory cell in which the read data matches the write data among the plurality of memory cells, and a retry control unit that designates at least some memory blocks among the plurality of memory blocks and simultaneously executes the retry process when the read data does not match the write data in any one of the plurality of memory cells in which all the write data is written.
US09280451B2
A testing device for evaluating operations of software installed in a mobile terminal includes a scenario selecting unit configured to select a scenario that includes information for causing the mobile terminal to execute a function that should be operated by the mobile terminal, a scenario execution determining unit configured to determine whether the scenario selected by the scenario selecting unit is executable, a scenario execution unit configured to execute the scenario determined to be executable by the scenario execution determining unit, and a scenario execution result determining unit configured to determine whether an execution result of the scenario executed by the scenario execution unit is the same as a result expected beforehand. The scenario execution determining unit determines whether the scenario selected by the scenario selecting unit is executable based on the execution result of the scenario executed by the scenario execution unit in the past.
US09280444B2
A system and computer-implemented method for determining a runtime of a thread of an application. Synchronization events for a first thread of an application executing on the computer system are received, the synchronization events including at least a first synchronization event and a second synchronization event for the first thread. A first difference between a synchronization event timestamp of the first synchronization event and the synchronization event timestamp of the second synchronization event is calculated. A second difference between an accumulated timestamp of the first synchronization event and the accumulated timestamp of the second synchronization event is calculated. A runtime of the first thread of the application is calculated as a difference between the first difference and the second difference.
US09280439B2
Systems and methods to provide usage analysis of a productive environment are provided. In example embodiments, a logging module links to a compiler to obtain information on a program as the program is being executed by the compiler. One or more procedures of the program may be determined and a count for each of the one or more determined procedures maintained. The determined one or more procedures and the count for each of the one or more determined procedures are stored in a buffer as log data. The log data is compiled, using one or more processors, into a detailed data source for further analysis.
US09280438B2
A processor performance profiler is enabled to for identify specific instructions causing performance issues within a program being executed by a microprocessor through random sampling to find the worst-case offenders of a particular event type such as a cache miss or a branch mis-prediction. Tracking all instructions causing a particular event generates large data logs, creates performance penalties, and makes code analysis more difficult. However, by identifying and tracking the worst offenders within a random sample of events without having to hash all events results in smaller memory requirements for the performance profiler, lower performance impact while profiling, and decreased complexity to analyze the program to identify major performance issues, which, in turn, enables better optimization of the program in shorter developer time.
US09280436B2
To model a computing entity, information relating to transactions associated with the computing entity is received. The received information forms a collection of information. The collection is segmented into a plurality of segments, and at least one anomalous segment is identified. A model of the computing entity is built.
US09280434B2
The present disclosure generally relates to the automated testing of a system that includes software or hardware components. In some embodiments, a testing framework generates a set of test cases for a system under test using a grammar. Each test case may perform an action, such as provide an input to the system under test, and result in an output from the system under test. The inputs and outputs are then compared to the expected results to determine whether the system under test is performing correctly. The data can then be interpreted in the grammar system or used as input to a fault isolation engine to determine anomalies in the system under test. Based on identified faults, one or more mitigation techniques may be implemented in an automated fashion.
US09280431B2
A system, method, and computer program product provide a process that includes storing data on first data storage devices, and a backup copy of the data on the first and/or on second ones of the data storage devices. A probability of a failure of each of at least some of the first and/or second data storage devices is determined, and at least one of the first and/or data storage devices that is determined to have a higher probability of failure than a threshold and/or a probability of failure of another of the data storage devices, is selected. A second backup copy of the data, stored on the selected data storage device(s), is also stored on third ones of the data storage devices. The first and/or second data storage devices determined to have the higher probability of failure are used for their designated purpose after the second backup copy is created.
US09280427B1
A method performed by a storage system includes a first storage processor performing input/output (IO) requests on a first one or more logical units, and a second storage processor performing IO requests on a second one or more logical units. If the first storage processor fails, the third storage processor performs the IO requests on the first one or more logical units. If the second storage processor fails, the fourth storage processor performing the IO requests on the second one or more logical units.
US09280420B2
Methods of operating memory systems and nonvolatile memory devices include performing error checking and correction (ECC) operations on M pages of data read from a first “source” portion of M-bit nonvolatile memory cells within the nonvolatile memory device to thereby generate M pages of ECC-processed data, where M is a positive integer greater than two (2). A second “target” portion of M-bit nonvolatile memory cells within the nonvolatile memory device is then programmed with the M pages of ECC-processed data using an address-scrambled reprogramming technique, for example.
US09280415B2
A semiconductor device includes a mode register set suitable for generating a first internal control signal and a second internal control signal, a per-DRAM addressability (PDA) driving unit suitable for resetting the mode register set in response to the first internal control signal and an input value of data inputted through a data pad, and a cycle redundancy check (CRC) driving unit suitable for performing a CRC operation by checking whether or not data are correctly inputted through the data pad without an error in response to the first internal control signal and the second internal control signal.
US09280409B2
Embodiments of the present invention disclose a method and system for single point of failure analysis (SPOF) and remediation. According to one embodiment, a SPOF analysis is performed based on component configuration information associated with a plurality of system components. Based on the SPOF analysis, at least one SPOF component is identified. In addition, remediation information for the identified SPOF is computed based on the component configuration information. The result of the SPOF analysis and the remediation information are then displayed to an operating user.
US09280407B2
According to one embodiment of the present invention, a system for processing a computer program for a distributed server environment executes the computer program in the distributed server environment in accordance with a configuration for the computer program. The computer program is generated within a development environment. The configuration indicates a type of server environment and is associated with one or more data sets for processing by the computer program. The system monitors execution of the computer program within the distributed server environment and provides a program status to the development environment. The system displays results produced by the computer program within the distributed server environment via the development environment. Embodiments of the present invention further include a method and computer program product for processing a computer program in substantially the same manners described above.
US09280403B2
To facilitate changing a system configuration and allow having high redundancy in a computer system connecting a plurality of nodes. A node includes a CPU and constitutes a computer system. The node executes one or more processes and including predetermined functions. The node includes a shared memory that stores system information including process information related to each process executed by each node, in a state accessible from each process of its own node. In the node, the system information including the process information related to each process of its own node is multicast to the other nodes. A shared memory control process of the node receives the system information multicast from the other nodes and stores the system information in the shared memory.
US09280393B2
A middleware processor provisioning process provisions a plurality of processors in a multi-processor environment. The processing capability of the multiprocessor environment is subdivided and multiple instances of service applications start protected processes to service a plurality of user processing requests, where the number of protected processes may exceed the number of processors. A single processing queue is created for each processor. User processing requests are portioned and dispatched across the plurality of processing queues and are serviced by protected processes from corresponding service applications, thereby efficiently using available processing resources while servicing the user processing requests in a desired manner.
US09280392B1
A host system reallocates resources in a virtual computing environment by first receiving a request to reallocate a first quantity of a first resource type. Next, potential trade-off groups are evaluated and a trade-off group is selected based on the evaluation. The selected trade-off group includes a set of applications running in the virtual computing environment that can use one or more alternate resource types as a substitute for the first quantity of the first resource type. After the selection, the host system reallocates the first quantity of the first resource type from the trade-off group. This reallocation may be made from the trade-off group to either a first application running in the virtual computing environment or the host system itself. If the reallocation is to the host system, then the total quantity of the first resource type allocated to applications running in the virtual computing environment is thereby reduced.
US09280390B2
Techniques are described for managing distributed execution of programs, including by dynamically scaling a cluster of multiple computing nodes performing ongoing distributed execution of a program, such as to increase and/or decrease computing node quantity. An architecture may be used that has core nodes that each participate in a distributed storage system for the distributed program execution, and that has one or more other auxiliary nodes that do not participate in the distributed storage system. Furthermore, as part of performing the dynamic scaling of a cluster, computing nodes that are only temporarily available may be selected and used, such as computing nodes that might be removed from the cluster during the ongoing program execution to be put to other uses and that may also be available for a different fee (e.g., a lower fee) than other computing nodes that are available throughout the ongoing use of the cluster.
US09280388B2
In general, the invention relates to a non-transitory computer readable medium comprising instructions, which when executed by a processor perform a method. The method includes obtaining lock overhead times for a plurality of threads, generating a set of thread groups, wherein each of the plurality of threads is assigned to one of the plurality of thread groups based on the lock overhead times, allocating at least one core of a multi-core system to each of the plurality of thread groups, and assigning a time-quantum for each of the plurality of thread groups, wherein the time-quantum for each of the plurality of thread groups corresponds to an amount of time that threads in each of the plurality of thread groups can execute on the at least one allocated core.
US09280386B1
Among other disclosed subject matter, a method includes receiving metric data associated with an execution of each of a plurality of task instances. The plurality of task instances include task instances associated with a task and the metric data for each task instance relating to execution performance of the task instance. The method includes for each task instance determining a deviation of the metric data associated with the task instance relative to an overall deviation of the metric data for the plurality of task instances of the task during each of a plurality of intervals and combining deviation measurements for the task instance that exceed a threshold deviation to obtain a combined deviation value. Each deviation measurement corresponds to the deviation of the metric data for one of the plurality of intervals. The method includes ranking the combined deviation values associated with at least a subset of the task instances.
US09280378B2
An installer installing an operating system on a host computer system detects that the operating system is to be run under a hypervisor, and causes at least one configuration parameter of the operating system to be adjusted based on the hypervisor. A migration tool migrating a virtual machine from one hypervisor to another hypervisor, identifies the types of the two hypervisors, the operating system used by the virtual machine, and causes at least one configuration parameter of the operating system to be adjusted based on the target hypervisor.
US09280372B2
A computer system implements a hypervisor which, in turn, implements one or more computer system instances and a controller. The controller and a computer system instance share a memory. A request is processed using facilities of both the computer system instance and the controller. As part of request processing, information is passed between the computer system instance and the controller via the shared memory.
US09280367B2
Examples are disclosed for assigning a switch identification to data received at an input/output device coupled to a host device. In some examples, the data may be associated with a virtual station interface (VSI) for a virtual machine implemented at the host device. For these examples, a switch identification may be assigned to the data based on identification information for the data or an originator of at least a portion of the identification information. The assigned switch identification may then be used as part of a lookup table to determine one or more actions for processing the data at the input/output device. Other examples are described and claimed.
US09280359B2
A method is provided in one example embodiment and includes logging in to a multipath target via first and second boot devices instantiated on a network device, the first and second boot devices respectively connected to the multipath target via first and second paths; determining which of the first and second paths comprises a least cost path; and booting the operating system via the least cost path. The determining may include comparing network statistics of the first path with network statistics of the second path, the network statistics comprising at least one of packet loss on the path, errors encountered via the path, and congestion on the path.
US09280357B2
Techniques for configuration are provided. A chassis ID identifies a chassis type. A device, such as a circuit board, may receive the chassis ID from the chassis. The device may be configured based on the chassis type.
US09280356B2
Embodiments of the present invention are provided that include executing, by a processor, a software stack received from a first boot image, and retrieving and executing, by the processor, a second software stack. A writeable boot device such as a storage device with a removable medium is detected, and the second software stack is saved by replacing, on the writeable boot device, the first boot image with a second boot image comprising the second software stack.
US09280352B2
An apparatus and method for avoiding bubbles and maintaining a maximum instruction throughput rate when cracking microcode instructions. A lookahead pointer scans the newest entries of a dispatch queue for microcode instructions. A detected microcode instruction is conveyed to a microcode engine to be cracked into a sequence of micro-ops. Then, the sequence of micro-ops is placed in a queue, and when the original microcode instruction entry in the dispatch queue is selected for dispatch, the sequence of micro-ops is dispatched to the next stage of the processor pipeline.
US09280351B2
Embodiments relate to second-level branch target buffer bulk transfer filtering. An aspect includes a system for second-level branch target buffer bulk transfer filtering. The system includes a first-level branch target buffer and a second-level branch target buffer coupled to a processing circuit. The processing circuit is configured to perform a method. The method includes receiving branch target buffer miss indicators, receiving instruction cache miss indicators, and recording information about the branch target buffer miss indicators and the instruction cache miss indicators in search trackers. Based on detecting, by the processing circuit, a search tracker representing a correlated pair of the branch target buffer miss indicators and the instruction cache miss indicators, the search tracker is activated by the processing circuit to perform a bulk transfer from the second-level branch target buffer to the first-level branch target buffer.
US09280350B2
Methods and apparatus to perform adaptive pre-fetch operations in managed runtime environments are disclosed herein. An example disclosed method includes determining an object size associated with a pre-fetch operation; comparing the object size to a first one of a series of thresholds having increasing respective values; when the object size is less than the first one of the series of thresholds, pre-fetching a first amount of stored data assigned to the first one of the series of thresholds; and when the object size is greater than the first one of the plurality of thresholds, comparing the object size to a next one of the series of thresholds.
US09280340B2
A pipeline development environment includes a toolset that includes a visual design editor. The editor comprises a display interface having a palette of known Annotators that may be selected by a developer. The pipeline development environment also includes or has associated therewith a data repository. The data repository stores datasets. A particular dataset is associated with an Annotator and comprises dependency data generated from execution of a pipeline (or some portion thereof). The repository typically stores datasets from many pipeline runs, including runs of other pipelines, multiple runs of a given pipeline with different inputs, etc. Using the editor, a developer creates a visual representation of the pipeline. As Annotators are added into the pipeline, system tooling dynamically generates the descriptor files and other configuration parameters (for the new pipeline), preferably based on the dependency data associated with the individual Annotators and retrieved from the repository.
US09280335B2
A composable software bundle is created by retrieving a semantic representation of a set of software modules. A functional representation of a set of operations is retrieved. Each operation in the set of operations is to be performed on the set of software modules during at least one virtual image life-cycle phase in a set of virtual image life-cycle phases. A set of artifacts including a set of executable instructions associated with the set of operations is identified. The semantic representation, the functional representation, and the set of artifacts, are stored in a composable software bundle.
US09280329B2
A device including a data analysis element including a plurality of memory cells. The memory cells analyze at least a portion of a data stream and output a result of the analysis. The device also includes a detection cell. The detection cell includes an AND gate. The AND gate receives result of the analysis as a first input. The detection cell also includes a D flip-flop including an output coupled to a second input of the AND gate.
US09280325B2
A request to invoke a text-list definition of a componentized application is received. The text-list definition of the componentized application identifies a collection of different listed independent application sub-components specified by a user to be executed as a set. A componentized user interface is created with a different user interface component associated with each of the different listed independent application sub-components within the text-list definition of the componentized application. The different listed independent application sub-components are independently accessed based upon user inputs received in association with the respective different user interface component associated with each of the different listed independent application components within the text-list definition of the componentized application.
US09280323B2
Example systems and methods of displaying semantic layers of source code of a computer program are presented. In one example, a user selection of a first portion of the source code is received. The first portion is displayed in a first display area and corresponds to a first semantic layer of the source code. A user command referring to a second portion of the source code related to the first portion is received, with the second portion corresponding to a second semantic layer of the source code. In response to the user command, a second display area for the second portion of the source code is displayed to indicate a relationship between the first and second portions while indicating a difference in semantic layers between the first and second portions.
US09280309B2
A setting information editing unit of a printer driver changes the print setting of an input print job. Upon changing the print setting, a print function is limited by inhibiting selection of the print function provided by the printer driver in accordance with a print authorization processed by a print authorization processing unit. Since the resetting process after inputting the print job to a print control apparatus is also subjected to print function limitation, the print function can be limited upon print job input. Hence, consistent print function limitation can be done.
US09280306B2
An information processing system includes an information management apparatus that accepts image generation requests and an image generation section that generates image data, which is provided independently of the information management apparatus. The information management apparatus issues a job ID in response to a print request from a client, and transmits the job ID and a URL of the image generation apparatus to the client. Based on the URL, the client directly requests the image generation apparatus for image data corresponding to the job ID.
US09280298B2
According to one embodiment, a storage device includes a first memory, an interface that includes first physical layers and connects a host and the first memory, a second memory that temporarily stores the data transferred between the host and the first memory, a controller that controls operation of the interface. When the data is transferred from the first memory to the host, the controller reads the data corresponding to the data transfer request into the second memory, the controller selects the physical layer to transfer the data from the second memory to the host based on a first period until the data is ready for transmission after data transfer is requested.
US09280292B2
A memory system includes a nonvolatile memory including a plurality of blocks as data erase units, a measuring unit which measures an erase time at which data of each block is erased, and a block controller which writes data supplied from at least an exterior into a first block which is set in a free state and whose erase time is oldest.
US09280284B2
A method, an apparatus, and a computer readable medium for polygon gesture detection and interaction, adapted to an electronic apparatus having an input unit, are provided. In the method, a gesture moving from a starting point to an end point is received by using the input unit and sampling points thereof are collected. A trajectory of the sampling points is analyzed to obtain a center of the gesture. A surrounding area of the center is divided into equal label areas. A distance and an angle relative to an origin of each sampling point in the label areas are calculated and used as a vertical axis and a horizontal axis to draw a waveform diagram. A shape formed by the trajectory is determined according to characteristics of the waveform diagram and a specific function corresponding to the shape is performed.
US09280283B2
Methods, devices and sensors for detecting a gesture are described. In an embodiment, a gesture sensor includes a time of flight sensor having a sensing element configured to generate an electrical signal responsive to received light. The time of flight sensor also includes a light source for emitting a burst of light. The sensing element has a sensing side for receiving light and a non-sensing side which is opposite the sensing side. The gesture sensor also includes one or more light inhibitors positioned relatively nearer the sensing side of the sensing element than the non-sensing side. The light inhibitors are asymmetric about a first center line of the sensing element. The first center line is located midway between first and second sides of the sensing element. The gesture sensor further includes a processor coupled to the time of flight sensor configured to detect a gesture.
US09280282B2
A touch unlocking method includes obtaining position information of a plurality of touch points on a device screen in response to sliding of a touch medium on the device screen. A value that reflects a change of a distance between touch points of the plurality of touch points is monitored when the plurality of touch points are located in plurality of touch areas on the device screen respectively. The unlocking control on the device screen is performed according to a result of a comparison between the value that reflects the change of the distance between the touch points and a distance change threshold.
US09280278B2
According to an aspect, a portable electronic apparatus includes a display unit for displaying an image; an input detection unit for detecting contact with an area in which the image is displayed by the display unit as input; and a control unit for causing the display unit to display a plurality of item objects and a group object surrounding the item objects. If the input detection unit detects first input of coming into contact with two different points in an area in which the group object is displayed and moving the contact with at least one of the two different points in a direction away from the other while maintaining the contact, the control unit causes the display unit to display the item objects in an aligned manner in a direction in which the distance between the two points increases.
US09280275B2
According to an aspect, a device includes a touch screen display and a controller. The controller displays a home screen in a layer on the touch screen display. The controller displays a different home screen in the same layer when a first gesture is performed on the home screen displayed on the touch screen display. The controller displays a home screen in a different layer when a second gesture is performed on the home screen displayed on the touch screen display.
US09280263B2
A mobile terminal capable of sensing a touch input, and a control method thereof are provided. The mobile terminal includes: a display unit configured to display screen information; a sensing unit configured to sense a touch input applied to the display unit; and a controller configured to display an indicator bar including at least one icon together with the screen information, and select any one of icons displayed in the indicator bar.
US09280262B2
A computer-implemented method includes displaying, within a user interface in a digital media system, a media pane, and a project pane, displaying, within the media pane, a thumbnail group representing a media item, the thumbnail group comprising one or more thumbnails, enabling a user to select, from the thumbnail group, a segment of the media item, and enabling a user to transfer the selected segment to the project pane.
US09280261B2
A graphical user interface for a media player application is described. A method is provided comprising: determining a screen orientation of the GUI in accordance with a device orientation; rendering a first user interface screen in a portrait screen orientation comprising an album list when the screen orientation is a portrait screen orientation; rendering a second user interface screen in a landscape screen orientation comprising an array of album art images arranged in rows and columns when the screen orientation is a landscape screen orientation; and displaying the rendered first or second user interface screen on the display.
US09280260B2
In an embodiment, a method is provided for organizing semi-structured data having properties. In this method, the semi-structured data are accessed and rendered on a graphical user interface. A user input defining a first graphical layout of a first subset of the semi-structured data is received. A second subset of the semi-structured data is identified as having properties similar to the properties of the first subset of the semi-structured data. A second graphical layout of the second subset of the semi-structured data is then provided. The second graphical layout matches the first graphical layout.
US09280255B2
Presentation descriptions are provided to an operating system of a computing device to present outputs associated with the applications in an organized and intuitive manner to the user. The presentation descriptions provide the operating system with information about the structure and meaning of the output element. The task of organizing at least part of the output elements associated with applications is delegated to the operating system. The operating system analyzes the presentation descriptions, and organizes the output elements associated with the applications at least partly based on the presentation descriptions.
US09280248B2
Electronic devices may use touch pads that have touch sensor arrays, force sensors, and actuators for providing tactile feedback. A touch pad may be mounted in a computer housing. The touch pad may have a rectangular planar touch pad member that has a glass layer covered with ink and contains a capacitive touch sensor array. Force sensors may be mounted under each of the four corners of the rectangular planar touch pad member. The force sensors may be used to measure how much force is applied to the surface of the planar touch pad member by a user. Processed force sensor signals may indicate the presence of button activity such as press and release events. In response to detected button activity or other activity in the device, actuator drive signals may be generated for controlling the actuator. The user may supply settings to adjust signal processing and tactile feedback parameters.
US09280245B2
An apparatus configured to determine an approximate position of an object utilizing mutual-capacitance sensing capabilities during a first mode of operation and determining one or more attributes of the object utilizing self-capacitance sensing capabilities during a second mode of operation is disclosed. The apparatus includes a touch panel controller configured to operatively couple to a touch panel sensor. The touch panel sensor includes a plurality of drive electrodes and at least one sense electrode. A plurality of nodes are formed at the intersections of the plurality of drive electrodes and the at least one sense electrode. The touch panel controller is configured to determine an approximate position of an object performing a touch event over the touch panel sensor during the first mode of operation and to determine one or more attributes of the object during the second mode of operation.
US09280237B2
Infrared-style touch screens are described having light emission means and light detection means along only two opposing sides of a touch input area, which are nevertheless able to detect and locate a touch object in two dimensions. Certain embodiments use an edge-blurring algorithm to determine the second coordinate, while other embodiments use a form of stereo-scopic vision to determine both coordinates by triangulation. These touch screens have minimal bezel width along two opposing sides of the touch input area, and also offer cost reductions associated with components and product assembly and manufacturing.
US09280232B2
A method for touch detection is provided for detecting a touch point on a display device. The method includes: providing a display signal, according to which the display device has two parts of a vertical blanking interval within each frame period, wherein the two parts of the vertical blanking interval are discontinuous; and performing a touch detection in the two parts of the vertical blanking interval, respectively. The touch detection method is capable of performing multiple touch detections within one frame period.
US09280229B2
A touch alphabet and communication system is provided. The communication system uses a predetermined set of touch gestures, such as fingertip touch patterns performable on keyless touch-sensitive surfaces, to express the user's desired communication. The touch-sensitive surface may be the touch screen display of a computer, tablet device, cell phone, or a touch-sensitive pad, for example. The finger touch patterns are based on a limited set of unique and ergonomically pleasing finger positions that may be performed in a limited area. The touch alphabet allows the user to comprehensively communicate without looking at the communication device, and with just one hand, or in another implementation, with two hands. Thus, a user can comfortably tap an entire alphabet and related functions, with one hand, without having to visualize the user interface surface or hunt for individual keys.
US09280227B2
A display unit comprising a plurality of display modules arranged in a row and having an upper display section and a lower display section. One of the display modules includes an interactive Kiosk, and a second of the display modules includes at least one computer controlled card reading video station. A consumer may pass a coded paint color sample card past a code reader in the video station and is thereafter presented with a display of a color present on the sample card followed by a selectable sequence of video display screens, which may comprise part of a color selection application program.
US09280205B2
A haptic feedback planar touch control used to provide input to a computer. A touch input device includes a planar touch surface that inputs a position signal to a processor of the computer based on a location of user contact on the touch surface. The computer can position a cursor in a displayed graphical environment based at least in part on the position signal, or perform a different function. At least one actuator is also coupled to the touch input device and outputs a force to provide a haptic sensation to the user contacting the touch surface. The touch input device can be a touchpad separate from the computer's display screen, or can be a touch screen. Output haptic sensations on the touch input device can include pulses, vibrations, and spatial textures. The touch input device can include multiple different regions to control different computer functions.
US09280203B2
Systems, methods and computer readable media are disclosed for a gesture recognizer system architecture. A recognizer engine is provided, which receives user motion data and provides that data to a plurality of filters. A filter corresponds to a gesture, that may then be tuned by an application receiving information from the gesture recognizer so that the specific parameters of the gesture—such as an arm acceleration for a throwing gesture—may be set on a per-application level, or multiple times within a single application. Each filter may output to an application using it a confidence level that the corresponding gesture occurred, as well as further details about the user motion data.
US09280202B2
A vision system of a vehicle includes an interior monitoring system operable to determine a gaze direction of the driver of the vehicle. A plurality of cameras is disposed at a vehicle and the cameras have respective fields of view exterior of the vehicle. A heads up display system is operable to display virtual images for viewing by the driver of the vehicle, with the displayed virtual images being displayed in the driver's gaze direction, such as via heads up display glasses worn by the driver. Responsive to a determination of the driver gazing in a direction towards a non-transparent portion of the vehicle, the heads up display system displays an image derived from image data captured by at least one of the plurality of cameras to display a virtual image representative of the driver's view as it would be through the non-transparent portion of the vehicle.
US09280199B2
This invention is directed to reducing power consumption even when there is a great amount of power consumed by a root complex in a printing apparatus that employs a PCI Express architecture. To accomplish this, a printing apparatus that includes a controller capable of switching between a root complex and an endpoint and an accelerator controller serving as a root complex performs the following processing. More specifically, in the power saving mode, the power source of the accelerator controller is turned off and the controller is set as a root complex. Power consumption in the power saving mode can be greatly reduced, and a return sequence from the power saving mode can be executed.
US09280197B1
In one embodiment, a method implemented on a first computing device includes: receiving video conference data for a video conference session; receiving battery level information for at least one other computing device participating in the video conference session, where the at least one other computing device is a mobile computing device; presenting the video conference session on the first computing device, where the presenting comprises presenting a representation of the battery level information associated with at least one the mobile computing device.
US09280196B2
A power management method for a computer system is provided. The power management method includes: obtaining a system power consumption; determining whether the system power consumption is greater than a first safe operating point; when the system power consumption is greater than the first safe operating point, controlling a CPU and a graphics processing unit (GPU) to activate a frequency reduction mechanism according to a first adjustment sequence; when the system power consumption is not greater than the first safe operating point, determining whether the system power consumption is smaller than a second safe operating point; and when the system power consumption is smaller than the second safe operating point, controlling the CPU and the GPU to deactivate the frequency reduction mechanism according to a second adjustment sequence. The second adjustment sequence is reverse to the first adjustment sequence.
US09280191B2
Systems and methods are disclosed that may be used for controlling information handling system power supply based on current system power policy such as current system load power need and/or based on current system load power capping information. The disclosed systems and methods may be so implemented to improve power use efficiency for information handling system applications in which a power supply unit (PSU) has a power delivery capability that is overprovisioned relative to the power-consuming system load component/s of an information handling system.
US09280187B2
Housing for at least one electric or electronic device, the housing surrounding a housing interior comprising a storage space, the electric or electronic device being arrangeable in the storage space, the housing comprising a housing upper part, which delimits the housing interior, the housing comprising at least one intermediate ceiling portion, which is arranged in the housing interior below the housing upper part and, together with the housing upper part, encloses at least one intermediate space, the intermediate ceiling portion having at least one cooling air passage, through which cooling air can flow from the storage space into the intermediate space, the housing upper part having at least one cooling air outlet, through which the cooling air can escape outwardly from the intermediate space, wherein the intermediate ceiling portion forms a catching arrangement for dripping water, which infiltrates the intermediate space through the cooling air outlet.
US09280183B2
Techniques for combining a polymer layer and a metal layer to form a multi-layer structure are disclosed. In one embodiment, an intermediate layer having pores, openings or voids is secured to the metal layer, and then the polymer layer is molded to the intermediate layer, whereby the pores, openings or voids in the surface of the intermediate layer serve to facilitate securing of the polymer layer to the metal layer. The multi-layer structure is suitable for use in as a portion of a housing for an electronic device, such as a portable electronic device.
US09280180B2
An information handling system provides connectors along a housing periphery with a reduced vertical footprint by adjusting a display circuit portion relative to a display panel portion to provide vertical space for the connectors. For example, the circuit portion aligns with the display panel portion along one side of the display to provide space for connectors at that side of the display, and the circuit portion extends past the perimeter of the display panel portion at an opposing side of the display. In one embodiment, the circuit portion extending outside the perimeter of the display panel portion includes circuits for powering a backlight disposed in the circuit portion.
US09280179B2
A tablet information handling system processes information with processing components disposed in a planar housing for presentation as images at a display disposed at the upper surface of the planar housing. Support members extend at the lower surface of the planar housing to support the planar housing in an upright configuration having the housing in a first orientation or an inclined configuration having the housing in a second orientation. A cooling fan controller manages cooling airflow direction through the planar housing based upon the orientation of the planar housing to blow hot air exiting the housing in a direction away from the likely location of an end user relative to the planar housing.
US09280177B2
The present application describes various embodiments regarding systems and methods for providing a lightweight and durable portable computing device having a thin profile. The portable computing device can take the form of a laptop computer. The laptop computer can include a uni-body top case having an integrated support system formed therein, the integrated support system providing structural support that distributes applied loads through the top case preventing warping and bowing.
US09280172B2
With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
US09280156B1
Disclosed herein are methods and apparatus for controlling autonomous vehicles utilizing maps that include visibility information. A map is stored at a computing device associated with a vehicle. The vehicle is configured to operate in an autonomous mode that supports a plurality of driving behaviors. The map includes information about a plurality of roads, a plurality of features, and visibility information for at least a first feature in the plurality of features. The computing device queries the map for visibility information for the first feature at a first position. The computing device, in response to querying the map, receives the visibility information for the first feature at the first position. The computing device selects a driving behavior for the vehicle based on the visibility information. The computing device controls the vehicle in accordance with the selected driving behavior.
US09280133B2
In a development device in which a developer containing unit underlies a development chamber, a supplying member in the development chamber forms a nip portion with a developer carrier and the developer carrier and the supplying member rotate in the direction in which their respective surfaces move from an upper end to a lower end of the nip portion.
US09280131B2
Provided is a developer container that accommodates developer, including: a first frame that has a recessed portion; and a second frame that has a first protruding portion, wherein the first frame and the second frame are joined by a first adhering portion in which the recessed portion and the first protruding portion are welded together, and a second adhering portion in which a second protruding portion and a flat portion are welded together, the recessed portion having a positioning inner side face that performs positioning of the first frame and the second frame within a recessed portion. Also provided are a method to manufacture a developer container, a developing apparatus having the developer container, a cleaning apparatus, a process cartridge, and an image forming apparatus.
US09280129B2
A developer cartridge has a rotatable body, a casing, a conveying guide structure, and a cover. The cover includes a facing part and a first covering part. The conveying guide structure includes a first conveying guide extending in the second direction, and a second conveying guide connected from the first conveying guide at an end on the other side of the second direction and extends toward the other side of the second direction so as to curve in the first direction with respect to the first conveying guide. The first covering part includes a first contacting part configured to contact the first conveying guide, and a second contacting part configured to curve in the first direction with respect to the first contacting part so as to extend toward the other side in the second direction, and contact the second conveying guide.
US09280127B2
An image forming apparatus includes a main casing having side wall and a frame defining a sheet opening. The side wall of the main casing and the frame define an accommodating space therebetween. The frame defines a first vent, and the frame further defines a second vent disposed below the first vent closer to the side wall than the first vent.
US09280121B2
The present invention relates to a rotational force driving assembly and a process cartridge used for being engaged with a rotational force driving head inside an electrophotographic image forming device. The rotational force driving assembly can comprise a hub, a rotational force receiving component, a side plate, and an axis offset adjusting mechanism. When the axis offset adjusting mechanism is not subjected to external force, the axis offset adjusting mechanism enables the axis of the rotational force receiving component to be parallel and offset to the axis of the hub. When the axis offset adjusting mechanism is subjected to external force, the rotational force receiving component extends out to be engaged with the rotational force driving head.