US09899667B2
An electrode composite material is disclosed in the invention. The electrode composite material comprises ABxCyDz, wherein A is selected from at least one of polypyrrole, polyacrylonitrile, and polyacrylonitrile copolymer; B comprises sulfur; C is selected from carbon material; D is selected from metal oxides, l≦x≦20, 0≦y
US09899666B2
A volume Ve of an electrode group thereof is calculated by Ve=(Sp+Sn)×D/2, where Sp represents an electrode plate area of a positive electrode plate, Sn represents an electrode plate area of a negative electrode plate, D represents the internal dimension of a container in the direction in which the electrode plates of the electrode group are laminated. A ratio (Vp+Vn)/Ve is 0.27 to 0.32, where Vp+Vn is the sum volume of the total pore volume Vp of a positive active material and the total pore volume Vn of the negative active material contained in the electrode group, and Ve is the volume of the electrode group. A ratio Vp/Ve is 0.13 to 0.15, where Vp is the total pore volume of the positive active material and Ve is the volume of the electrode group.
US09899659B2
A method of preparing an anode of lithium ion batteries or an electrode plate of a supercapacitor. The method includes admixing a terpene resin-based aqueous binder. The terpene resin-based aqueous binder includes a terpene resin emulsion including between 20 and 80 wt. % of a terpene resin, and the terpene resin emulsion has a viscosity of between 2000 and 10000 mPa·s.
US09899658B2
A high current fuse with a short time constant is provided for use in an electric vehicle. The fuse is designed to exhibit thermal characteristics that are similar if not substantially identical to those of the wire bond interconnects used in the vehicle's battery pack. As a result, the system does not go into an overheat protection condition when the system is subjected to repetitive high current cycles, such as those common during aggressive and/or spirited driving.
US09899652B2
A method of managing leakage of liquid inside a battery system comprises: containing leaking liquid in a non-liquid sensitive region of the battery system so as to protect internal electrical components of the battery system from coming in contact with the leaking liquid; and in direct response to the leakage, expunging the leaking liquid from the battery system. A drain device includes: a body with a port therethrough, the body configured to be positioned in a wall of a container; means for opening the port in response to a first liquid contacting the drain device on an inside of the container; and means for resisting ingress into the container by a second liquid that contacts the drain device on an outside of the container.
US09899647B2
An onboard power supply apparatus includes: power storage modules each including power storage devices; a pair of brackets configured to come into contact with respective ends of the power storage modules vertically stacked so as to fix at least an upper power storage module to a vehicle; and an insertion portion that is disposed between at least one of the pair of brackets and an end of one of the power storage modules located between terminal portions of the vertically stacked power storage modules, a connecting member used for connecting the terminal portions of the vertically stacked power storage modules being inserted in the insertion portion.
US09899645B2
A battery pack may include a drainage device provided at a bottom portion of the housing case. The drainage device may include a drain hole communicating between the inside and the outside of the housing case, so that water introduced into the housing case is discharged to the outside of the housing case. The drainage device may be disposed between two of the terminal members that are connected to electrodes of the battery cells.
US09899644B2
A battery module includes a battery pack, a strap, and an adjuster. The strap has an attached portion, an adjusted portion and a fixed portion. The attached portion is attached to the battery pack, and the adjusted portion extends from one side of the attached portion. The fixed portion extends from the other side of the attached portion. The adjuster is positioned on the adjusted portion and has a buckle and an elastic element. The buckle is positioned between the elastic element and the battery pack. The elastic element and the battery pack oppose to the same side of the strap. The adjusted portion of the strap passes through the buckle. The battery pack with the strap and the adjuster is fixed on the plate base for protecting itself against outside damage.
US09899629B2
An organic light-emitting diode display panel includes a lower substrate; an upper substrate; and an organic light-emitting diode structure formed between the lower substrate and the upper substrate. A side of the organic light-emitting diode structure facing towards the upper substrate is a light output side, and the upper substrate is a strengthened glass plate, subjected to a strengthening processing, which serves as a protective glass plate as an outermost layer of the organic light-emitting diode display panel.
US09899625B2
A display device includes pixels, each pixel including a first electrode, a first organic layer disposed on the first electrode, and a second electrode disposed on the first organic layer, in which the first electrode includes a first overlapping electrode portion overlapping each of the first organic layer and the second electrode, and a first non-overlapping electrode portion not overlapping the first organic layer and the second electrode, and connected to the first overlapping electrode portion.
US09899620B2
An organic electroluminescence device includes a pair of electrodes and an organic compound layer interposed therebetween. The organic compound layer includes a plurality of emitting layers at least including a first emitting layer and a second emitting layer. The first emitting layer contains a first host material and a fluorescent first luminescent material. The second emitting layer contains a second luminescent material that is different from the first luminescent material. A difference ΔST(H1) between singlet energy EgS(H1) of the first host material and an energy gap Eg77K(H1) at 77[K] of the first host material satisfies a specific relationship. One of the first luminescent material and the second luminescent material has a main peak wavelength from 400 nm to less than 500 nm and the other of the first luminescent material and the second luminescent material has a main peak wavelength from 500 nm to 700 nm.
US09899617B2
A production method of a hole blocking layer includes: a liquid layer forming step that causes a liquid composition and a surface of a member on which the hole blocking layer is to be formed, to contact with each other thereby forming a liquid layer comprising the liquid composition on the surface of the member on which the hole blocking layer is to be formed, the liquid composition containing a zinc source comprising bis(acetylacetonato)zinc, a complexing agent comprising acetylacetone, and a polar solvent; and a drying step that heats the liquid layer formed by the liquid layer forming step to vaporize the complexing agent and the polar solvent from the liquid layer thereby forming a hole blocking layer comprising zinc oxide on the surface of the member on which the hole blocking layer is to be formed.
US09899613B2
Provided is an organic light-emitting element having high light-emitting efficiency and a long element lifetime. Specifically, provided is an organic light-emitting element, including: an anode; a cathode; and an organic compound layer placed between the anode and the cathode, in which: the organic compound layer includes an emission layer; the emission layer includes at least a host and a guest; the guest is an iridium complex of a specific structure; the host is a heterocycle-containing compound; and a content of the host is 50 wt % or more with reference to a total amount of constituent materials for the emission layer.
US09899607B2
A compound for an organic optoelectronic device, an organic light emitting diode including the same, and a display device including the organic light emitting diode are disclosed and the compound for an organic optoelectronic device represented by a combination of the following Chemical Formulae 1 and 2 provides an organic light emitting diode having life-span characteristics due to excellent electrochemical and thermal stability, and high luminous efficiency at a low driving voltage.
US09899596B2
A method for producing a semiconducting organic film comprising the steps: preparing a first mixture comprising a first organic semiconducting material of type p having a molar mass of less than or equal to 2,000 g·mol−1 and a first organic semiconducting material of type n having a molar mass of less than or equal to 2,000 g·mol−1, adding a second organic semiconducting material to the first mixture to form a second mixture, wherein the second organic semiconducting material is one or more polymers having a molar mass greater than or equal to 10,000 g·mol−1, and forming the organic film from the second mixture.
US09899590B2
Provided is a thermoelectric element. The thermoelectric element includes an insulation substrate, a semiconductor layer on the insulation substrate, insulation layers disposed on the semiconductor layer and spaced apart from each other in a first direction parallel with a surface of the insulation substrate, metal thin films disposed on the insulation layers, and metal-semiconductor compound layers between the semiconductor layer and the second parts. Each of the metal thin films includes a first part overlapping the insulation layer and a second part extending from the first part in the first direction or in a direction opposite to the first direction to be connected to the semiconductor layer, and the second parts facing each other in the metal thin films adjacent to each other are spaced apart from each other.
US09899581B2
A light emitting device including a contact layer, a blocking layer over the contact layer, a protection layer adjacent the blocking layer, a light emitter over the blocking layer, and an electrode layer coupled to the light emitter. The electrode layer overlaps the blocking layer and protection layer, and the blocking layer has an electrical conductivity that substantially blocks flow of current from the light emitter in a direction towards the contact layer. In addition, the protection layer may be conductive to allow current to flow to the light emitter or non-conductive to block current from flowing from the light emitter towards the contact layer.
US09899580B2
A polyester resin composition comprises: (A) a first polyester resin having a melting temperature of greater than about 285° C.; (B) a second polyester resin having a melting temperature of less than or equal to about 285° C.; (C) a white pigment; and (D) an inorganic filler. The polyester resin composition may exhibit improved mechanical properties and discoloration resistance and can be used in a molded article, for example, as a LED reflector.
US09899577B2
A light-emitting apparatus comprising a photoluminescent layer that emits light in response to excitation light and has a light-emitting surface, the light from the photoluminescent layer being emitted through the light-emitting surface. The light-emitting surface includes a first region and a second region. The light from the photoluminescent layer includes first light having a wavelength λa in air. The first light emitted through the first region has a smaller directional angle than the first light emitted through the second region.
US09899573B2
Disclosed herein is a slim LED package. The slim LED package includes first and second lead frames separated from each other, a chip mounting recess formed on one upper surface region of the first lead frame by reducing a thickness of the one upper surface region below other upper surface regions of the first lead frame, an LED chip mounted on a bottom surface of the chip mounting recess and connected with the second lead frame via a bonding wire, and a transparent encapsulation material protecting the LED chip while supporting the first and second lead frames.
US09899568B2
For a Periodic Table Group 13 metal nitride semiconductor crystal obtained by epitaxial growth on the main surface of a base substrate that has a nonpolar plane and/or a semipolar plane as its main surface, an object of the present invention is to provide a high-quality semiconductor crystal that has a low absorption coefficient, is favorable for a device, and is controlled dopant concentration in the crystal, and to provide a production method that can produce the semiconductor crystal. A high-quality Periodic Table Group 13 metal nitride semiconductor crystal that has a precisely controlled dopant concentration within the crystal and a low absorption coefficient and that is thus favorable for a device, can be provided by inhibiting oxygen doping caused by impurity oxygen and having the Si concentration higher than the O concentration.
US09899563B2
A light emitting diode (LED) with a micro-structure lens includes a LED die and a micro-structure lens. The micro-structure lens includes a convex lens portion, at least one concentric ridge structure surrounding the convex lens portion, and a lower portion below the convex lens portion and the at least one concentric ridge structure. The lower portion is arranged to be disposed over the LED die. A first optical path length from an edge of the LED die to a top center of the microstructure lens is substantially the same as a second optical path length from the edge of the LED die to a side of the micro-structure lens.
US09899552B2
A self-adhesive edge-protection tape is intended to improve the protective effect for glass edges. This is achieved by providing an adhesive tape which comprises, in sequence directed towards the substrate to be covered, a backing layer (hard phase) and a soft phase comprising a polymer foam, a viscoelastic composition and/or an elastomeric composition, where the thickness of the hard phase is ≦150 μm, the thickness of the soft phase is ≧200 μm and the ratio of the thickness of the soft phase to the thickness of the hard phase is ≧4. The invention also relates to a solar module which comprises an adhesive tape according to the invention adhesive-bonded around at least one portion of the edges thereof, and the use of the claimed adhesive tape for the protection of edges of a solar module.
US09899547B2
A method of forming a wavelength detector that includes forming a first transparent material layer having a uniform thickness on a first mirror structure, and forming an active element layer including a plurality of nanomaterial sections and electrodes in an alternating sequence atop the first transparent material layer. A second transparent material layer is formed having a plurality of different thickness portions atop the active element layer, wherein each thickness portion correlates to at least one of the plurality of nanomaterials. A second mirror structure is formed on the second transparent material layer.
US09899546B2
One embodiment of the present invention provides an electrode grid positioned at least on a first surface of a photovoltaic structure. The electrode grid can include a number of finger lines and an edge busbar positioned at an edge of the photovoltaic structure. The edge busbar can include one or more paste-alignment structures configured to facilitate confinement of conductive paste used for bonding the edge busbar to an opposite edge busbar of an adjacent photovoltaic structure.
US09899545B2
A composition for solar cell electrodes and electrodes fabricated using the same. The composition includes silver powder; fumed silica; a glass frit; and an organic vehicle. The composition has improved contact efficiency between electrodes and a silicon wafer by introducing specific fumed silica. Solar cell electrodes fabricated using the composition exhibit minimized serial resistance, thereby providing excellent fill factor and conversion efficiency.
US09899532B2
A thin-film transistor (TFT) and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display apparatus are provided. The method for manufacturing the TFT includes: forming a gate electrode, a gate insulating layer, a metal oxide semiconductor active layer, a source electrode and a drain electrode on a substrate; the forming the metal oxide semiconductor active layer includes: forming the metal oxide semiconductor active layer by electrochemical reaction. The method for manufacturing the TFT is applied in the production of the TFT and the array substrate and the display apparatus comprising the TFTs and provides a new method for forming the metal oxide semiconductor active layer.
US09899529B2
A method for making a self-aligned vertical nanosheet field effect transistor. A vertical trench is etched in a layered structure including a plurality of layers, using reactive ion etching, and filled, using an epitaxial process, with a vertical semiconductor nanosheet. A sacrificial layer from among the plurality of layers is etched out and replaced with a conductive (e.g., metal) gate layer coated with a high-dielectric-constant dielectric material. Two other layers from among the plurality of layers, one above and one below the gate layer, are doped, and act as dopant donors for a diffusion process that forms two PN junctions in the vertical semiconductor nanosheet.
US09899514B2
Devices and methods for forming a device are disclosed. A substrate is provided. A first body well of a second polarity type is formed in the substrate. A second body well of the second polarity type is formed in the first body well. A bottom of the second body well and a bottom of the first body well are contiguous. Dopant concentrations of the first and second body wells include a graded profile. A transistor of a first polarity type is formed over the substrate. The transistor includes a source and a drain. The source is formed in the second body well.
US09899510B2
The present disclosure provides a semiconductor device, which includes a compensation area which includes p-regions and n-regions, and a plurality of transistor cells on the compensation area. Each of the plurality of transistor cells includes a source region, a body region, a gate and an interlayer dielectric, and a source metallization layer arranged on the interlayer dielectric. The semiconductor device further includes an additional n-doping region that is provided on top of the n-regions between two neighboring body regions, and a source plug which fills a contact hole formed through the interlayer dielectric between the source and body region and the source metallization layer, so as to electrically connect the source and body region and the source metallization layer.
US09899509B2
An embodiment of a semiconductor device comprises a trench transistor cell array in a semiconductor body. The semiconductor device further comprises an edge termination region of the trench transistor cell array. At least two first auxiliary trench structures extend into the semiconductor body from a first side and are consecutively arranged along a lateral direction. The edge termination region is arranged, along the lateral direction, between the trench transistor cell array and the at least two first auxiliary trench structures. First auxiliary electrodes in the at least two first auxiliary trench structures are electrically connected together and electrically decoupled from electrodes in trenches of the trench transistor cell array.
US09899507B2
A nitride semiconductor transistor device provides a normally-off nitride semiconductor transistor device which is excellent in switching properties with less dispersion of the properties. The nitride semiconductor transistor device has a buffer layer, a GaN layer, and an AlGaN layer in turn grown on a substrate. A first insulating film, a charge storage layer, a second insulating film, and a control electrode are in turn grown on the AlGaN layer. A source electrode and a drain electrode are formed to sandwich the charge storage layer over the AlGaN layer. A threshold voltage to shut off an electric current flowing between the source and drain electrodes through a conductive channel induced at an interface of the AlGaN layer and the GaN layer is made positive by adjusting the charge stored in the charge storage layer.
US09899499B2
A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm; a semiconductor nitride layer in contact with the semiconductor handle substrate, the semiconductor nitride layer selected from the group consisting of aluminum nitride, boron nitride, indium nitride, gallium nitride, aluminum gallium nitride, aluminum gallium indium nitride, aluminum gallium indium boron nitride, and combinations thereof; a dielectric layer in contact with the semiconductor nitride layer; and a semiconductor device layer in contact with the dielectric layer.
US09899496B2
The present disclosure provides a device having a doped active region disposed in a substrate. The doped active region having an elongate shape and extends in a first direction. The device also includes a plurality of first metal gates disposed over the active region such that the first metal gates each extend in a second direction different from the first direction. The plurality of first metal gates includes an outer-most first metal gate having a greater dimension measured in the second direction than the rest of the first metal gates. The device further includes a plurality of second metal gates disposed over the substrate but not over the doped active region. The second metal gates contain different materials than the first metal gates. The second metal gates each extend in the second direction and form a plurality of respective N/P boundaries with the first metal gates.
US09899495B2
A semiconductor device includes a source including a first doped semiconductor layer arranged on a substrate, a layer of metal arranged on the first doped semiconductor layer, and a second doped semiconductor layer arranged on the layer of metal; a channel extending from the second doped semiconductor layer to a drain including an epitaxial growth; a gate disposed on sidewalls of the channel between the second doped semiconductor layer and the drain; an interlayer dielectric (ILD) disposed on the second doped semiconductor layer and the gate; and a source contact extending from a surface of the ILD to abut the layer of metal of the source.
US09899488B2
A semiconductor device includes a semiconductor body having a front side and a back side, and a trench included in the semiconductor body. The trench extends into the semiconductor body along an extension direction that points from the front side to the back side. The trench includes an electrode structure and an insulation structure, the insulation structure insulating the electrode structure from the semiconductor body and the electrode structure being arranged for receiving an electric signal from external of the semiconductor device. The electrode structure includes a first electrode and a second electrode in contact with the first electrode, the first electrode including a first electrode material and the second electrode including a second electrode material different from the first electrode material. The first electrode extends further along the extension direction as compared to the second electrode.
US09899487B2
A semiconductor device may include a linear gate trench that crosses an active region of a substrate of the semiconductor device. The active region may include a plurality of gate areas at a bottom of the gate trench and junction areas at a surface of the substrate in a central portion and opposite end portions of the active region. A conductive line may be in a lower portion of the gate trench. The conductive line may include a gate line and a capping layer that at least partially isolates the gate line from an upper surface of the conductive line. A sealing line may be in an upper portion of the gate trench. The sealing line may cover the conductive line and a surface of the sealing line may be coplanar with the junction areas.
US09899478B2
A semiconductor device includes transistor cells that connect a first load electrode with a drift structure forming first pn junctions with body zones when a gate voltage applied to a gate electrode exceeds a first threshold voltage. First auxiliary cells in a vertical projection of and electrically connected with the first load electrode are configured to inject charge carriers into the drift structure at least in a forward biased mode of the first pn junctions. Second auxiliary cells are configured to inject charge carriers into the drift structure at high emitter efficiency when in the forward biased mode of the first pn junctions the gate voltage is below a second threshold voltage lower than the first threshold voltage and at low emitter efficiency when the gate voltage exceeds the second threshold voltage.
US09899477B2
An edge termination structure is disclosed. The edge termination structure includes an active cell in a semiconductor wafer, an edge termination region adjacent the active cell in the semiconductor wafer, where the edge termination region includes a recessed field oxide region and a termination charge region below the recessed field oxide region. The recessed field oxide region may be thermally grown in a recess in the semiconductor wafer. A top surface of the recessed field oxide region is substantially coplanar with a top surface of the semiconductor wafer. The active cell may include at least one insulated-gate bipolar transistor surrounded by the edge termination region in the semiconductor wafer. The termination charge region has a conductivity type opposite of that of the semiconductor wafer. The termination charge region is adjacent to at least one guard ring in the semiconductor wafer.
US09899475B2
The present disclosure relate to an integrated chip having long-channel and short-channel transistors having channel regions with different doping profiles. In some embodiments, the integrated chip includes a first gate electrode arranged over a first channel region having first length, and a second gate electrode arranged over a second channel region having a second length greater than the first length. The first channel region and the second channel region have a dopant profile, respectively along the first length and the second length, which has a dopant concentration that is higher by edges than in a middle of the first channel region and the second channel region. The dopant concentration is also higher by the edges of the first channel region than by the edges of the second channel region.
US09899474B2
Semiconductor devices includes a thin epitaxial layer (nanotube) formed on sidewalls of mesas formed in a semiconductor layer. In one embodiment, a semiconductor device includes a first semiconductor layer, a second semiconductor layer formed thereon and of the opposite conductivity type, and a first epitaxial layer formed on mesas of the second semiconductor layer. An electric field along a length of the first epitaxial layer is uniformly distributed.
US09899473B2
Provided are methods of forming nanostructures, methods of manufacturing semiconductor devices using the same, and semiconductor devices including nanostructures. A method of forming a nanostructure may include forming an insulating layer and forming a nanostructure on the insulating layer. The insulating layer may have a crystal structure. The insulating layer may include an insulating two-dimensional (2D) material. The insulating 2D material may include a hexagonal boron nitride (h-BN). The insulating layer may be formed on a catalyst metal layer. The nanostructure may include at least one of silicon (Si), germanium (Ge), and SiGe. The nanostructure may include at least one nanowire.
US09899464B2
An organic light emitting diode display includes a substrate, a scan line on the substrate for transferring a scan signal, a data line crossing the scan line and for transferring a data signal, a driving voltage line crossing the scan line and for transferring a driving voltage, a switching thin film transistor coupled to the scan line and the data line, a driving thin film transistor coupled to a switching drain electrode of the switching thin film transistor, and an organic light emitting diode (OLED) coupled to a driving drain electrode of the driving thin film transistor, wherein a driving semiconductor layer of the driving thin film transistor is bent and in a plane substantially parallel to the substrate.
US09899461B2
An organic light-emitting diode display is disclosed. The display includes a semiconductor layer formed over a substrate, a scan line formed over the semiconductor layer and configured to provide a scan signal, and a light emission control line formed over the semiconductor layer and configured to provide a light emission control signal. The display includes a data line configured to provide a data voltage and a driving voltage line configured to provide a driving voltage, wherein the driving voltage line crosses the scan line and is electrically insulated from the scan line. A switching transistor is electrically connected to the scan line and the data line and includes a switching drain electrode. A driving transistor includes a driving source electrode electrically connected to the switching drain electrode. Any one of the semiconductor layer and the light emission control line includes an extension at least partially overlapping the data line.
US09899458B2
An organic light-emitting display device comprises: a substrate; a thin film transistor (TFT) disposed on the substrate; a protection film disposed on the substrate so as to cover the TFT and including a hole; a pixel electrode disposed on the protection film so as to cover an inner surface of the hole, and electrically connected to the TFT; a pixel-defining film disposed on the pixel electrode and the protection film and including an opening that exposes a part of the pixel electrode; and first and second spacers disposed on the pixel-defining film. The first spacer is disposed so as to correspond to the hole, and a height of the second spacer is higher than a height of the first spacer.
US09899451B2
An array of cross point memory cells comprises spaced elevationally inner first lines, spaced elevationally outer second lines which cross the first lines, and a multi-resistive state region elevationally between the first and second lines where such cross. Individual of the multi-resistive state regions comprise elevationally outer multi-resistive state material and elevationally inner multi-resistive state material that are electrically coupled to one another. The inner multi-resistive state material has opposing edges in a vertical cross-section. The outer multi-resistive state material has opposing edges in the vertical cross-section that are laterally offset relative to the opposing edges of the inner multi-resistive state material in the vertical cross-section. Methods are also disclosed.
US09899446B2
A solid-state image sensing device capable of suppressing a dark current and transfer failure during a global shutter operation is provided. The solid-state image sensing device according to one embodiment includes: a semiconductor substrate having a main surface and a back surface being on the opposite side of the main surface; a well region arranged in contact with the main surface in the semiconductor substrate; a photoelectric conversion region arranged in contact with the main surface in the well region; a charge holding region arranged in contact with the main surface in the well region; a floating diffusion region arranged in contact with the main surface in the well region; a first transfer gate so formed as to face the well region and the charge holding region; and a second transfer gate so formed as to face the well region.
US09899440B2
A solid state imaging device including: a pixel region that is formed on a light incidence side of a substrate and to which a plurality of pixels that include photoelectric conversion units is arranged; a peripheral circuit unit that is formed in a lower portion in the substrate depth direction of the pixel region and that includes an active element; and a light shielding member that is formed between the pixel region and the peripheral circuit unit and that shields the incidence of light, emitted from an active element, to the photoelectric conversion unit.
US09899439B2
Provided are an image sensor with micro-lenses having a high refractive index and an image processing system including the same. The image sensor includes: a semiconductor substrate in which a photoelectric conversion device is formed; at least one color filter formed on the semiconductor substrate; at least one color filter fence formed on the semiconductor substrate and between two neighboring color filters among the at least one color filter; and at least one micro-lens formed on the color filter, respectively. The micro-lens has a first refractive index equal to or greater than a first threshold. The filter fence has a second refractive index less than or equal to a second threshold. The second threshold is less than the first threshold.
US09899438B2
A solid-state imaging device which includes a plurality of pixels in an arrangement, each of the pixels including a photoelectric conversion element, pixel transistors including a transfer transistor, and a floating diffusion region, in which the channel width of transfer gate of the transfer transistor is formed to be larger on a side of the floating diffusion region than on a side of the photoelectric conversion element.
US09899437B2
A CMOS image sensor includes a photodiode, a plurality of transistors for transferring charges accumulated at the photodiode to one column line, and a voltage dropping element connected to a gate electrode of at least one transistor among the plurality of transistors for expanding a saturation region of the transistor by dropping down a gate voltage inputted to the gate electrode of the at least one transistor.
US09899434B1
A light-receiving device includes a silicon semiconductor substrate, a plurality of first serial connections each of which includes a first avalanche photodiode (APD) and a first resistor connected in series, and a plurality of second serial connections each of which includes a second avalanche photodiode (APD) and a second resistor connected in series. The first APDs and the first resistors are formed on the silicon semiconductor substrate, and the first APDs is formed of silicon. The second APDs and the second resistors are formed on the silicon semiconductor substrate, and the second APDs is formed of a material having a smaller band gap than silicon. The plurality of first and second serial connections is connected in parallel between an anode terminal and a cathode terminal.
US09899433B2
The invention relates to an array substrate and a method for preparing the same, and a display device. The method for preparing an array substrate comprises steps S1) forming a pattern, which includes a gate electrode, a gate electrode insulating layer, an active layer and a source-drain electrode, on a base substrate; and S2) forming a transparent conducting layer on the base substrate on which step S1 has been accomplished, and simultaneously forming a pattern including a pixel electrode and a data line via a one-time patterning process. In this method, the steps of the manufacture process can be reduced, the production cost can be saved, and the production efficiency can be improved. Moreover, since the pixel electrode and the data line may be both formed to have a low resistance value and a high light transmission rate, the performance of the array substrate can be improved.
US09899432B2
Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer. The sacrificial layer may be selectively removed from between the first portion of the semiconductor active layer and the handling substrate to thereby define a suspended integrated circuit chip encapsulated by the capping layer.
US09899426B2
Display backplanes and pixel element structures are described. In an embodiment, a pixel electrode is located between two stacked data lines, with a left edge of the pixel electrode being separated from a first lower data line by approximately a same distance as a right edge of the pixel electrode is separated from a second lower data line.
US09899419B2
A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.
US09899416B2
There is provided a semiconductor device capable of enhancing device performance by variably adjusting threshold voltage of a transistor having gate-all-around structure. The semiconductor device includes a substrate including a first region and a second region, a first wire pattern provided on the first region of the substrate and spaced apart from the substrate, a second wire pattern provided on the second region of the substrate and spaced apart from the substrate, a first gate insulating film surrounding a perimeter of the first wire pattern, a second gate insulating film surrounding a perimeter of the second wire pattern, a first gate electrode provided on the first gate insulating film, intersecting with the first wire pattern, and including a first metal oxide film therein, a second gate electrode provided on the second gate insulating film and intersecting with the second wire pattern, a first gate spacer on a sidewall of the first gate electrode, and a second gate spacer on a sidewall of the second gate electrode.
US09899412B2
A vertical semiconductor device includes a channel structure extending from a substrate in a first direction perpendicular to an upper surface of the substrate, and a ground selection line, word lines, and a string selection line sequentially formed on a side surface of the channel structure in the first direction to be separated from one another. The channel structure includes a protruding region formed in a side wall portion of the channel structure between the ground selection line and the upper surface of the substrate, the protruding region protruding in a horizontal direction perpendicular to the first direction.
US09899408B2
A non-volatile memory device having a vertical structure includes: a first interlayer insulating layer on a substrate; a first gate electrode disposed on the first interlayer insulating layer; second interlayer insulating layers and second gate electrodes alternately stacked on the first gate electrode; an opening portion penetrating the first gate electrode, the second interlayer insulating layers, and the second gate electrodes and exposing the first interlayer insulating layer; a gate dielectric layer covering side walls and a bottom surface of the opening portion; and a channel region formed on the gate dielectric layer, and penetrating a bottom surface of the gate dielectric layer and the first interlayer insulating layer and thus electrically connected to the substrate, wherein a separation distance between side walls of the gate dielectric layer in a region which contacts the first gate electrode is greater than that in a region which contacts any one of the second gate electrodes.
US09899407B2
A semiconductor device is disclosed. The semiconductor device includes an electrode disposed on a substrate and a plurality of vertical patterns passing through the electrode. The vertical patterns include first vertical patterns arranged to form a rhombus and second vertical patterns arranged to form a non-regular trapezoid or a rhombus.
US09899405B2
Disclosed are a semiconductor device and a manufacturing method thereof. According to the semiconductor device and the manufacturing method thereof according to exemplary embodiments of the present invention, after the dopant source layer is uniformly deposited on a channel layer of the device with the 3-demensional vertical structure by the plasma-enhanced atomic layer deposition (PEALD) method, the deposited dopant source layer is heat-treated so that the dopants are diffused into the channel layer to function as charge carriers, thereby preventing the charges in the channel layer from being reduced. According to the exemplary embodiments of the present invention, the diffusion speed and concentration of the dopant may be controlled by forming the barrier layer between the channel layer and the dopant source layer.
US09899403B2
Resistance of a FINFET is reduced while performance of an element is prevented from being deteriorated due to an increase in stress, thereby performance of a semiconductor device is improved. When a memory cell formed on an upper side of a first fin and an n transistor formed on an upper side of a second fin are mounted on the same semiconductor substrate, the surface of the first fin having a source/drain region of the memory cell is covered with a silicide layer, and part of a source/drain region of the n transistor is formed of an epitaxial layer covering the surface of the second fin.
US09899400B2
A semiconductor device and a method of manufacturing a semiconductor device may be provided. The semiconductor device may include first channel layers arranged in a first direction. The semiconductor device may include second channel layers adjacent to the first channel layers in a second direction crossing the first direction and arranged in the first direction. The semiconductor device may include insulating layers stacked while surrounding side walls of the first and second channel layers. The semiconductor device may include conductive layers interposed between the insulating layers, and including first metal patterns extended in the first direction and second metal patterns extended in the first direction while surrounding the side walls of the first channel layers.
US09899392B2
The inventive concepts provide silicon precursors, methods of forming a layer using the same, and methods of fabricating a semiconductor device using the same. The silicon precursor includes a silane group including two or more silicon atoms. The silicon precursor has a high and uniform adsorption property on surfaces of layers (e.g., a silicon layer, an oxide layer, and a nitride layer) that are mainly used when semiconductor devices are fabricated.
US09899390B2
Methods and systems for reducing electrical disturb effects between thyristor memory cells in a memory array are provided. Electrical disturb effects between cells are reduced by using a material having a reduced minority carrier lifetime as a cathode line that is embedded within the array. Disturb effects are also reduced by forming a potential well within a cathode line, or a one-sided potential barrier in a cathode line.
US09899375B1
The present disclosure relates to semiconductor structures and, more particularly, to co-integration of self-aligned and non-self aligned heterojunction bipolar transistors and methods of manufacture. The structure includes at least two heterojunction bipolar transistor (HBT) devices integrated onto a same wafer with different epitaxial base profiles. An intrinsic base epitaxy for a second device of the at least two HBT devices acts as an extrinsic base for a first device of the at least two HBT devices.
US09899373B1
A device with a vertical transistor and a metal-insulator-metal (MIM) capacitor on a same substrate includes a vertical transistor including a bottom source/drain, a fin channel extending vertically from the bottom source/drain to a top source/drain, and a gate arranged around the fin channel, and the gate including a dielectric layer, a gate metal, and spacers arranged on opposing sides of the gate; and a MIM capacitor including a gate arranged over the bottom source drain, the gate including a gate metal and a dielectric layer, and a metal arranged in a depression in the bottom source/drain and extending through a channel in the gate to cover the gate, the metal directly contacting the dielectric layer of the gate.
US09899370B2
This document discusses, among other things, an auxiliary self-protecting transistor circuit, system, and method configured to protect a complementary metal-oxide semiconductor (CMOS) transistor. The auxiliary self-protecting transistor circuit can include an ESD device including a gate terminal, a drain terminal, and a source terminal. The ESD device is configured to be coupled to an isolation region of a complementary metal-oxide semiconductor (CMOS) transistor, and can provide a discharge path between the isolation region of the CMOS transistor and the source terminal of the ESD device. The isolation region of the CMOS transistor can include a blocking junction, such as an n-doped isolation well (niso), a p-type well (pwell), or one or more other blocking junctions.
US09899366B2
An electronic device is formed by a sequence of at least two thyristors coupled in series in a same conduction direction. Each thyristor has a gate of a first conductivity type. The gates of the first conductivity type for the thyristors in the sequence are coupled together in order to form a single control gate.
US09899364B2
An integrated circuit with an active geometry with a wide active region and with a narrow active region with at least one jog where said wide active region transitions to said narrow active region and where a gate overlies said jog. A method of making an integrated circuit with an active geometry with a wide active region and with a narrow active region with at least one jog where said wide active region transitions to said narrow active region, where a gate overlies said jog and where a gate overlies the wide active region forming a wide transistor.
US09899358B2
Printed circuit board (PCB) structures and methods of assembling them are described herein. In some embodiments, a PCB structure may include a first mounting hole; first, second, and third projections radiating from the first mounting hole; and a second mounting hole adjacent to the third projection. The first and second mounting holes located at opposite ends of the third projection. The second mounting hole to cause an electrical coupling of a bottom integrated circuit (IC) module to a connection structure included in a PCB, and the first mounting hole, the first projection, and the second projection to cause positioning of a top IC module above the bottom IC module and electrical coupling of the top IC module to the connection structure.
US09899357B2
An LED module includes: a substrate having a main surface and a back surface which face in opposite directions from each other in a thickness direction; a first LED chip including a first electrode pad bonded to a surface facing the same direction as the main surface; a first wire having one end bonded to the first electrode pad; and a wiring pattern having a main surface electrode formed in the main surface, wherein the main surface electrode includes a first die pad portion which supports the first LED chip, and when viewed from the thickness direction, the first die pad portion includes a main pad portion to which the first LED chip is bonded and an auxiliary pad portion which protrudes from the main pad portion in a direction toward a position of the first electrode pad from the center position in the first LED chip.
US09899354B2
A method for making a semiconductor device includes forming rims on first and second dice. The rims extend laterally away from the first and second dice. The second die is stacked over the first die, and one or more vias are drilled through the rims after stacking. The semiconductor device includes redistribution layers extending over at least one of the respective first and second dice and the corresponding rims. The one or more vias extend through the corresponding rims, and the one or more vias are in communication with the first and second dice through the rims.
US09899352B2
A data storage device may include a package substrate, and an upper semiconductor chip disposed above a top surface of the package substrate. At least one lower bump is disposed on a bottom surface of the package substrate. A lower semiconductor chip is disposed on the bottom surface of the package substrate and spaced apart from the at least one lower bump. The lower semiconductor chip is thinner than the at least one lower bump.
US09899342B2
A redistribution circuit structure electrically connected to at least one conductor underneath is provided. The redistribution circuit structure includes a dielectric layer, an alignment, and a redistribution conductive layer. The dielectric layer covers the conductor and includes at least one contact opening for exposing the conductor. The alignment mark is disposed on the dielectric layer. The alignment mark includes a base portion on the dielectric layer and a protruding portion on the base portion, wherein a ratio of a maximum thickness of the protruding portion to a thickness of the base portion is smaller than 25%. The redistribution conductive layer is disposed on the dielectric layer. The redistribution conductive layer includes a conductive via, and the conductive via is electrically connected to the conductor through the contact opening. A method of fabricating the redistribution circuit structure and an integrated fan-out package are also provided.
US09899337B2
A semiconductor package includes a package member and a stress controlling layer. The package member includes an encapsulation layer and at least one chip. The encapsulation layer encapsulates the at least one chip. The stress controlling layer is disposed on a surface of the package member. The stress controlling layer has an internal stress to the extent that the stress controlling layer prevents the package member from having warpage.
US09899319B2
A semiconductor device with a semiconductor-on-insulator (SOI) structure is provided including an insulating layer and a semiconductor layer formed on the insulating layer and a fuse. The fuse includes a first at least partially silicided raised semiconductor region with a first silicided portion and, adjacent to the first at least partially silicided raised semiconductor region, a second at least partially silicided raised semiconductor region with a second silicided portion. The second silicided portion is formed in direct physical contact with the first silicided portion.
US09899317B1
A method for fabricating a semiconductor structure includes the following steps. A substrate including a dielectric material is formed. A surface of the substrate is molecularly modified to convert the surface of the substrate to a nitrogen-enriched surface. A metal layer is deposited on the molecularly modified surface of the substrate interacting with the molecularly modified surface to form a nitridized metal layer.
US09899314B2
A method for fabricating a semiconductor substrate is disclosed, which includes: forming a first dielectric layer on a substrate body; forming a plurality of first vias penetrating the first dielectric layer to expose portions of the substrate body; forming a second dielectric layer on the first dielectric layer and the exposed portions of the substrate body, wherein the second dielectric layer extends on walls of the first vias; etching the second dielectric layer to form a plurality of openings communicating with the first vias and form a plurality of second vias penetrating the second dielectric layer in the first vias so as to expose portions of the substrate body, leaving the second dielectric layer on the walls of the first vias; and forming a circuit layer in the openings, and forming a plurality of conductive vias in the second vias for electrically connecting the circuit layer and the substrate body.
US09899310B2
A wiring substrate includes an insulating layer, at least one via hole formed in the insulating layer, a first wiring layer formed on one surface of the insulating layer and having a droop portion at an end-side of the via hole, a second wiring layer formed on the other surface of the insulating layer, and a metal-plated layer formed in the via hole and configured to connect the second wiring layer and the droop portion of the first wiring layer. One surface of the insulating layer around the via hole is formed as a convex curved surface and the droop portion of the first wiring layer is arranged on the convex curved surface.
US09899309B2
A semiconductor substrate is provided, including a substrate body having a lateral surface, and a protruding structure extending outward from the lateral surface. The semiconductor substrate distributes stresses generated during a manufacturing process through the protruding structure, and is thus prevented from delamination or being cracked. An electronic package having the semiconductor substrate is also provided.
US09899308B2
A semiconductor package is provided, including a semiconductor substrate having a plurality of conductive vias, a buffer layer formed on the semiconductor substrate, a plurality of conductive pads formed on end surfaces of the conductive vias and covering the buffer layer. During a reflow process, the buffer layer greatly reduces the thermal stress, thereby eliminating the occurrence of cracking at the interface of conductive pads. A method of fabricating such a semiconductor package is also provided.
US09899302B2
According to an exemplary implementation, a semiconductor package includes a multi-phase power inverter having power switches and situated on a leadframe of the semiconductor package. The semiconductor package further includes a temperature sensor situated on the leadframe, where the temperature sensor is configured to generate a sensed temperature of the power switches. The semiconductor package also includes a driver circuit configured to drive the power switches of the multi-phase power inverter responsive to the sensed temperature. The temperature sensor can be on a common IC with the driver circuit. Furthermore, the semiconductor package can include an over-temperature protection circuit configured to provide over-temperature protection to the multi-phase power inverter using the sensed temperature.
US09899296B2
A method of preparing a semiconductor substrate with metal bumps on both sides of the substrate includes depositing a first-side UBM layer on a first surface of the substrate, and forming a plurality of first-side metal bumps on the first surface of the substrate after the first-side UBM layer is deposited. The method includes forming a second-side UBM layer on a second side of the substrate, and the first surface and the second surface are opposite of each other. The method includes forming a plurality of second-side metal bumps on the second surface of the substrate after the second-side UBM layer is deposited. The method includes removing exposed first-side UBM layer and exposed second-side UBM layer after the plurality of first-side metal bumps and the plurality of second-side metal bumps are formed. The method includes reflowing the plurality of first-side metal bumps and the plurality of second side metal bumps.
US09899293B2
Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. An uppermost semiconductor die of the stack of semiconductor dice located on a side of the stack of semiconductor dice opposite the substrate may be a heat-generating component configured to generate more heat than each other semiconductor die of the stack of semiconductor dice. Electrical connectors may extend directly from the uppermost semiconductor die to the substrate. A heat sink may be located on a side of the uppermost semiconductor die opposite the substrate. A passivation material may be located between the uppermost semiconductor die and the heat sink.
US09899288B2
A device package is provided. The device package includes a first die and a second die. A top surface of the first die is offset from a top surface of the second die in a direction that is parallel to a sidewall of the first die. A molding compound extends along sidewalls of the first die and the second die, where at least a portion of a top surface of the molding compound includes an inclined surface. A polymer layer contacts the top surface of the molding compound, the top surface of the first die, and the top surface of the second die. A top surface of the polymer layer is substantially level. A first conductive feature is in the polymer layer, where the first conductive feature is electrically connected to the first die.
US09899287B2
A fan-out wafer level package structure includes a chip, a molding compound, at least one circuit layer, and at least one dielectric layer. The molding compound encapsulates the chip. The at least one circuit layer is disposed on a surface of the chip and a surface of the molding compound coplanar to the surface of the chip. The at least one circuit layer includes a plurality of traces. Each of the traces includes a first portion and a second portion. The first portion is located at an edge region of a projection of the chip onto the dielectric layer. A width of the first portion is larger than a width of the second portion. The at least one dielectric layer is disposed at a side of the at least one circuit layer.
US09899279B2
A symmetrical, flat laminate structure used to minimize variables in a test structure to experimentally gauge white bump sensitivity to CTE mismatch is disclosed. The test structure includes a flat laminate structure. The method of using the test structure includes isolating a cause of a multivariable chip join problem that is adversely impacted by warpage and quantifying a contribution of the warpage, itself, in a formation of the multivariable chip join problem.
US09899268B2
A method includes forming at least one fin in a semiconductor substrate. A fin spacer is formed on at least a first portion of the at least one fin. The fin spacer has an upper surface. The at least one fin is recessed to thereby define a recessed fin with a recessed upper surface that it is at a level below the upper surface of the fin spacer. A first epitaxial material is formed on the recessed fin. A lateral extension of the first epitaxial material is constrained by the fin spacer. A cap layer is formed on the first epitaxial material. The fin spacer is removed. The cap layer protects the first epitaxial material during the removal of the fin spacer.
US09899263B2
A method of forming a layout design for fabricating an integrated circuit (IC) is disclosed. The method includes identifying one or more areas in the layout design occupied by one or more segments of a plurality of gate structure layout patterns of the layout design; and generating a set of layout patterns overlapping the identified one or more areas. The plurality of gate structure layout patterns has a predetermined pitch smaller than a spatial resolution of a predetermined lithographic technology. A first layout pattern of the set of layout patterns has a width less than twice the predetermined pitch.
US09899249B2
A coreless packaging substrate is provided, which includes: a dielectric layer having opposite first and second surfaces; a first circuit layer embedded in the dielectric layer and exposed from the first surface of the dielectric layer, wherein the first circuit layer has a plurality of first conductive pads; a plurality of protruding elements formed on the first conductive pads, respectively, wherein each of the protruding elements has contact surfaces to be encapsulated by an external conductive element; a second circuit layer formed on the second surface of the dielectric layer; and a plurality of conductive vias formed in the dielectric layer for electrically connecting the first circuit layer and the second circuit layer. The present invention strengthens the bonding between the first conductive pads and the conductive elements due to a large contact area between the protruding elements and the conductive elements.
US09899248B2
A semiconductor device and method for forming the semiconductor device is provided. The semiconductor device includes an integrated circuit having through vias adjacent to the integrated circuit die, wherein a molding compound is interposed between the integrated circuit die and the through vias. The through vias have a projection extending through a patterned layer and protrude from the patterned layer to expose tapered sidewalls.
US09899247B2
A storage portion includes a first support portion and a second support portion that support a container. The storage portion is configured to change between a first state and a second state due to the second support portion being raised or lowered. An inert gas supply apparatus includes a connection portion at a height at which the connection portion is connected to the container in the first state and the connection portion is located away from and below the container in the second state. A transport moving body includes a third support portion supporting the container and a protrusion/retraction driving portion that causes the third support portion to protrude and retract. The third support portion is inserted into a transfer space when moved so as to protrude or retract by the protrusion/retraction driving portion. Movement path of the third support portion overlaps with the connection portion in a vertical direction view.
US09899243B2
A light irradiation apparatus includes: a rotary holding unit that rotates a substrate around a rotary axis while holding the substrate; a lighting unit positioned to face the rotary holding unit; a light shielding mask positioned between the rotary holding unit and the lighting unit, and widened along a direction orthogonal to the rotary axis; and a driving unit that linearly moves the lighting unit along the direction orthogonal to the rotary axis. The light shielding mask overlaps with the substrate when viewed in the direction of the rotary axis. The light shielding mask has an opening portion. An opening width of the opening portion at a side away from the rotary axis is larger than the opening with near the rotary axis. The lighting unit irradiates light through the opening portion toward the surface of the substrate while being moved above the opening portion by the driving unit.
US09899238B2
Embodiments of the invention include device packages and methods of forming such packages. In an embodiment, the method of forming a device package may comprise forming a reinforcement layer over a substrate. One or more openings may be formed through the reinforcement layer. In an embodiment, a device die may be placed into one of the openings. The device die may be bonded to the substrate by reflowing one or more solder bumps positioned between the device die and the substrate. Embodiments of the invention may include a molded reinforcement layer. Alternative embodiments include a reinforcement layer that is adhered to the surface of the substrate with an adhesive layer.
US09899234B2
Methods and techniques for fabricating metal interconnects, lines, or vias by subtractive etching and liner deposition methods are provided. Methods involve depositing a blanket copper layer, removing regions of the blanket copper layer to form a pattern, treating the patterned metal, depositing a copper-dielectric interface material such that the copper-dielectric interface material adheres only to the patterned copper, depositing a dielectric barrier layer on the substrate, and depositing a dielectric bulk layer on the substrate.
US09899231B2
Provided is a hard mask composition for spin-coating, and more particularly, a hard mask composition including a graphene copolymer and a solvent for spin-coating. The hard mask composition according to an exemplary embodiment has an improved etching resistance, and thus, etching with an increased aspect ratio may also be performed on a mask having a smaller thickness.
US09899217B2
A method is provided for producing a microelectronic device provided with different strained areas in a superficial layer of a semi-conductor on insulator type substrate, including amorphizing a region of the superficial layer and then a lateral recrystallization of the region from crystalline areas adjoining the region.
US09899208B2
A process for forming land grid array semiconductor packages includes a leadframe that is supported by a substrate comprising mold compound. In some embodiments, at least one die is electrically coupled to the leadframe by bondwires. The package comprises a second mold compound to act as an encapsulant. An apparatus for forming a land grid array semiconductor package includes means for molding a leadframe, assembling thereon at least one semiconductor device, applying a second mold, and singulating to form individual devices. A land grid array package comprises a leadframe, a substrate for supporting the leadframe, at least one semiconductor device and a mold compound.
US09899199B2
The invention relates to a mass spectrometer, comprising an ion guide having a plurality of electrodes that are supplied with a radio frequency voltage to facilitate radial confinement of ions in an internal volume defined by inward facing surfaces of the electrodes, the internal volume including a first section having a variable radial diameter along a longitudinal axis of the ion guide, in which the electrodes are helically wound, and an adjacent second section having a substantially constant radial diameter along the longitudinal axis, wherein the electrodes extend from the first section to the second section continuously. The continuous nature of the ion guide electrodes facilitates in particular unhindered axial propagation of ions through the assembly and prevents ion losses during their transmission through different compartments of the mass spectrometer.
US09899198B2
Disclosed herein is a method for analyzing evolved gas and an evolved gas analyzer, the method correcting detection sensitivity differences in analysis devices, day-to-day variations thereof, thereby quantifying a measurement target with high accuracy. The method for analyzing evolved gas of the apparatus including: a sample holder; a heating unit evolving a gas component; an ion source generating ions by ionizing the gas component; a mass spectrometer detecting the gas component; and a gas channel through which mixed gas flows, the method including: operating a discharged flow rate controlling process of controlling a flow rate of the mixed gas discharged to outside; operating a sample holder cooling process of cooling the sample holder by bringing the sample holder into contact with a cooling unit; and operating a correction process including: correcting a mass spectrum position; calculating a sensitivity correction factor; and calculating a heating correction factor.
US09899197B2
A hybrid extreme ultraviolet (EUV) imaging spectrometer includes: a radiation source to: produce EUV radiation; subject a sample to the EUV radiation; photoionize a plurality of atoms of the sample; and form photoions from the atoms subject to photoionization by the EUV radiation, the photoions being desorbed from the sample in response to the sample being subjected to the EUV radiation; an ion detector to detect the photoions: as a function of a time-of-arrival of the photoions at the ion detector after the sample is subjected to the EUV radiation; or as a function of a position of the photoions at the ion detector; an electron source to: produce a plurality of primary electrons; subject the sample to the primary electrons; and form scattered electrons from the sample in response to the sample being subjected to the primary electrons; and an electron detector to detect the scattered electrons: as a function of a time-of-arrival of the scattered electrons at the electron detector after the sample is subjected to the EUV radiation or the primary electrons; or as a function of a position of the scattered electrons at the electron detector.
US09899193B1
Provided herein are approaches for dynamically modifying plasma volume in an ion source chamber by positioning an end plate and radio frequency (RF) antenna at a selected axial location. In one approach, an ion source includes a plasma chamber having a longitudinal axis extending between a first end wall and a second end wall, and an RF antenna adjacent a plasma within the plasma chamber, wherein the RF antenna is configured to provide RF energy to the plasma. The ion source may further include an end plate disposed within the plasma chamber, adjacent the first end wall, the end plate actuated along the longitudinal axis between a first position and a second position to adjust a volume of the plasma. By providing an actuable end plate and RF antenna, plasma characteristics may be dynamically controlled to affect ion source characteristics, such as composition of ion species, including metastable neutrals.
US09899184B2
An optical vacuum cryostage for correlative light and electron microscopy comprises a vacuum chamber, an anti-contamination system adapter interface, an electron microscope specimen holder adapter interface, an upper optical window, a lower optical window, a vacuum pumping system adapter interface and a vacuum valve, wherein the anti-contamination system adapter interface is arranged in one end of the vacuum chamber, the electron microscope specimen holder adapter interface is arranged in the other end of the vacuum chamber, the upper optical window is arranged on the upper wall of the vacuum chamber, the lower optical window is arranged on the lower wall of the vacuum chamber and opposite to the upper optical window.
US09899172B2
The invention is intended to provide a circuit breaker or a circuit breaker operating method enabling a current interruption action to be performed efficiently. A circuit breaker is characterized in that includes a fixed contact and a movable contact that comes in and goes out of contact with the fixed contact; a main circuit conductor that is electrically connected to the fixed contact and the movable contact; an operating mechanism including a mover configured by concatenating permanent magnets or magnetic materials alternately having opposite N and S magnetic polarities along the direction of motion axis of the movable contact and magnetic poles disposed to face the N and S magnetic polarities of the mover and wound with windings; a current detector that detects a current flowing through the main circuit conductor; and a control device that varies the amount of a current to be supplied to the windings of the magnetic poles, depending on a current value detected by the current detector.
US09899169B2
An exemplary movable contact for an electric switch having a first contact blade and a second contact blade. Each of the first contact blade and the second contact blade includes an assembly hole. The movable contact having an assembly pin wherein the assembly pin includes a separation portion having a diameter greater than the assembly holes of the first and second contact blades thereby keeping the first and second contact blades separated from each other. The assembly pin includes a contact blade portion on each side of the separation portion for insertion to the assembly holes of the contact blades.
US09899153B2
A capacitor has a variable capacitance settable by a bias voltage. A method for setting the bias voltage including the steps of: (a) injecting a constant current to bias the capacitor; (b) measuring the capacitor voltage at the end of a time interval; (c) calculating the capacitance value obtained at the end of the time interval; (d) comparing this value with a desired value; and (e) repeating steps (a) to (d) so as long as the calculated value is different from the set point value. When calculated value matches the set point value; the measured capacitor voltage is stored as a bias voltage to be applied to the capacitor for setting the variable capacitance.
US09899150B2
The present invention relates generally to the fields of electrical engineering and electronics. More specifically, the present invention relates to passive components of electrical circuitry and more particularly to energy storage devices and method of production thereof.
US09899149B2
An electronic component includes a magnetic body having first and second end surfaces opposing each other and first and second side surfaces connected to the first and second end surfaces, and first and second internal coil patterns disposed in the magnetic body and including coil pattern portions having a spiral shape and lead portions connected to ends of the coil pattern portions and exposed to one surfaces of the magnetic body, respectively. The coil pattern portions are exposed to the first and second side surfaces, and first and second side parts are disposed on the first and second side surfaces. A manufacturing method therefore is presented.
US09899148B2
A device for manufacturing a field pole magnet body includes a reference jig having reference surfaces in a lengthwise direction, a width direction, and a thickness direction for positioning the plurality of cleaved and divided magnet fragments; a lengthwise direction pressing means that presses the magnet fragments from the lengthwise direction to the lengthwise direction reference surface; a width direction pressing means that presses them from the width direction to the width direction reference surface; and a thickness pressing means that presses them from the thickness direction to the thickness direction reference surface. The lengthwise direction pressing means is operated to press the magnet fragments in a state in which a pressing force of at least one of the width direction pressing means and the thickness direction pressing means is suppressed to be weaker than a pressing force generated by the lengthwise direction pressing means or is released.
US09899145B2
Systems, methods and apparatus for wireless power transfer and particularly wireless power transfer to remote systems such as electric vehicles are disclosed. In one aspect an induction coil is provided comprising a plurality of substantially co-planar coils formed from one or more lengths of conducting material, each length of conducting material being electrically connectable at each end to a power source or battery, and wherein at least one of the lengths of conducting material is continuously wound around two or more of the coils. In another aspect, a method is provided for forming such an induction coil. In yet another aspect, a switching device is operable to alter the configuration of the coils, for example in response to a detected characteristic of another induction coil or device coupled thereto.
US09899143B2
The present application provides a chip electronic component and a manufacturing method thereof. More particularly, there is provided a chip electronic component including a thin insulating film having a reduced width and extended up to a lower portion of a coil pattern without exposing the coil pattern such that the coil pattern has no direct contact with a magnetic material, thereby preventing a poor waveform at high frequency and increasing inductance.
US09899138B1
A coil structure for generating a uniform magnetic field and a coil apparatus having the same are disclosed. The coil apparatus has a plurality of coil units, and each of the coil units includes a sub-coil and a plurality of wire sections. The sub-coil has an eccentric-coil portion and two circuit connecting portions. The two circuit connecting portions are respectively connected to two segments of the eccentric-coil portion. The wire sections are arranged in parallel at intervals, are opposite the sub-coil, overlap the sub-coil, and are relatively inclined to the sub-coil. The circuit connecting portions of the segments of the coil units are connected to each other to form an auxiliary coil. A center position of the sub-coils is corresponding to a center position of the auxiliary coil so that a current flows through the sub-coils and the auxiliary coil to generate a uniform magnetic field.
US09899136B2
A coil component includes a body portion, a coil portion, and an electrode portion. The body portion includes a magnetic material, the coil portion is disposed in the body portion, and the electrode portion is disposed on the body portion and electrically connected to the coil portion. The coil portion includes a first coil layer in which a plurality of conductors having a planar spiral shape are stacked, a second coil layer in which a plurality of conductors having a planar spiral shape are stacked, and a first bump disposed between the first and second coil layers to electrically connect the first and second coil layers to each other. The first coil layer and the second coil layer are electrically connected to each other through the first bump to form a single coil having coil turns adjacent to each other in horizontal and vertical directions.
US09899124B2
The present disclosure is drawn to an electrostatic ink composition comprising a resin and an elongate conductive species. Also disclosed herein is a substrate on which is electrostatically printed a conductive trace, wherein the trace comprises a resin and an elongate conductive species. Further disclosed herein is a method of electrophotographic printing an electrostatic ink composition comprising a resin and an elongate conductive species.
US09899118B2
An aluminum alloy wire rod has a composition including Mg: 0.10-1.0 mass %, Si: 0.10-1.20 mass %, Fe: 0.01-1.40 mass %, Ti: 0.000-0.100 mass %, B: 0.000-0.030 mass %, Cu: 0.00-1.00 mass %, Ag: 0.00-0.50 mass %, Au: 0.00-0.50 mass %, Mn: 0.00-1.00 mass %, Cr: 0.00-1.00 mass %, Zr: 0.00-0.50 mass %, Hf: 0.00-0.50 mass %, V: 0.00-0.50 mass %, Sc: 0.00-0.50 mass %, Co: 0.00-0.50 mass %, Ni: 0.00-0.50 mass %, and the balance: Al and incidental impurities, Mg/Si mass ratio being 0.4 to 0.8. The aluminum alloy wire rod has a tensile strength of greater than or equal to 200 MPa, an elongation of greater than or equal to 13%, a conductivity of 47% IACS, and a ratio (YS/TS) of 0.2% yield strength (YS) to the tensile strength (TS) of less than or equal to 0.7.
US09899112B2
A structure configuring a ridge filter has line symmetry about a line vertical to a depth direction passing the center of the structure. A small structure obtained in such a way that the structure is divided by this line has a bilaterally asymmetric shape about a center line in an iterative direction, and has a point symmetric shape about an intersection between the center line in the iterative direction and the center line in the depth direction. Thicknesses in the iterative direction of an uppermost stream surface and a lowermost stream surface in the depth direction are equal to each other. The structure is configured so that a thick portion in the iterative direction of the uppermost stream surface and the lowermost stream surface is not present in the depth direction.
US09899109B2
Disclosed herein are a treatment apparatus and method for a waste steam generator, and an installation method of a treatment apparatus for a waste steam generator. The treatment apparatus includes a cutting part for cutting a body of a waste steam generator, a driving part for driving the cutting part, and a support frame for supporting the cutting part and the driving part, wherein the support frame is coupled to an outer peripheral surface of the body of the waste steam generator in a divided state, and the cutting part is driven and cuts the body in a state in which the support frame is coupled to the outer peripheral surface of the body. Consequently, since the treatment apparatus is easily moved and installed, an installation time of the treatment apparatus may be shortened and an exposure time of a worker can be reduced.
US09899101B2
To reduce power consumption of a shift register. A semiconductor device includes a shift register. The shift register includes a plurality of stages. Any one of the stages includes first to fourth switches and a sequential circuit. The first switch and the second switch are electrically connected to each other in parallel between a first wiring and a second wiring. The third switch and the fourth switch are electrically connected to each other in series between a third wiring and the second wiring. The first wiring has a function of transmitting a clock signal. The third wiring has a function of transmitting a potential corresponding to a high or low level of the clock signal. A signal of the second wiring or a signal in accordance with the signal of the second wiring is input to a sequential circuit.
US09899098B1
A semiconductor memory device includes a first word line and a second word line that are adjacent to each other, a first voltage boosting circuit configured to generate a first voltage based on a clock signal, a second voltage boosting circuit configured to generate a second voltage lower than the first voltage based on the clock signal, a counter, and a determination circuit. The counter counts a first number of clock cycles of the clock signal during a first period in which the first voltage boosting circuit generates the first voltage and applies the first voltage to the first word line while the second voltage boosting circuit generates the second voltage and applies the second voltage to the second word line, and a second number of clock cycles of the clock signal during a second period in which the first voltage boosting circuit generates the first voltage while the first word line is electrically disconnected from the first voltage boosting circuit. The determination circuit compares the first number of clock cycles and the second number of clock cycles to determine whether or not a leakage exists in the word lines.
US09899095B2
A nonvolatile semiconductor memory device includes a memory cell array having first and second groups of memory strings, each memory string including first and second memory cells connected between select transistors. The nonvolatile semiconductor memory device further includes a first word line connected to the first memory cells of the memory strings, a second word line connected to the second memory cells of the memory strings, and a control unit configured to control application of control voltages to the select transistors and the word lines, such that a select line voltage is applied to the first word line and a non-select line voltage is applied to the second word line and not discharged while select transistors of the first group of memory strings are turned off and select transistors of the second group of memory strings are turned on.
US09899090B2
During a phase of programming the cell, a first voltage is applied to the source region and a second voltage, higher than the first voltage, is applied to the drain region until the cell is put into conduction. The numerical value of the item of data to be written is controlled by the level of the control voltage applied to the control gate and the item of data is de facto written with the numerical value during the putting into conduction of the cell. The programming is then stopped.
US09899088B1
Circuits and methods are disclosed for decomposition of a content addressable memory into a plurality of CAMs having a lower cost. In an example implementation, a set of CAM rules are grouped into a plurality of subsets. For each of the subsets, CAM rules in the subset are reformatted for storage in a respective CAM configured to store fewer ternary bits or configured for prefix match. Each reformatted subset of CAM rules are stored in the respective CAM. A search key formatting circuit is configured to reformat an input search key for each of the respective CAMs is used to store the reformatted subsets to produce a respective reformatted search key and input the respective reformatted search key to the respective CAM.
US09899073B2
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. In some examples, multi-level accessing, sensing, and other operations for ferroelectric memory may be based on sensing multiple charges, including a first charge associated with a dielectric of the memory cell and a second charge associated with a polarization of the memory cell. In some cases, multi-level accessing, sensing, and other operations may be based on transferring a first charge associated with a dielectric of the memory cell to a sense amplifier, isolating the sense amplifier, activating the sense amplifier, transferring a second charge associated with a polarization of the memory cell to the sense amplifier, and activating the sense amplifier a second time.
US09899071B2
Provided is an electric-current-controllable magnetic unit, including: a substrate, an electric-current channel disposed on the substrate, the electric-current channel including a composite heavy-metal multilayer comprising at least one heavy-metal; a capping layer disposed over the electric-current channel; and at least one ferromagnetic layer disposed between the electric-current channel and the capping layer.
US09899062B2
An interface apparatus for designating a link destination, is provided with: a range designating device (110) for designating a desired range in a screen on which motion picture content is reproduced; a range mark setting device (107b) for superimposing and displaying a range mark indicating the designated range on the motion picture content; a movement operating device (110, 105, 107b) for moving the range mark in a desired direction, along with a lapse of reproduction time of the motion picture content in the screen; a link destination inputting device (110) for inputting link destination identification information as what corresponds to the range mark; and a holding device (106) for holding position information indicating a position of the range mark, in association with the link destination identification information and each time point in the reproduction time.
US09899056B1
A computer-implemented method, according to one embodiment, includes, performing anti-aliasing filtering on each of a plurality of symmetrical square wave signals, each symmetrical square wave signal having a frequency that is a different fraction of a frequency of a data read clock. The filtered symmetrical square wave signals are passed through a band pass filter. An amplitude of each of the symmetrical square wave signals is measured after the band pass filtering. In response to the amplitudes of the symmetrical square wave signals being within a predefined range, anti-aliasing settings used during the anti-aliasing filtering are stored. In response to the amplitudes of the symmetrical square wave signals being outside the predefined range, the anti-aliasing settings are changed.
US09899049B2
A magnetic write head having trailing magnetic shield and a trailing magnetic return pole that are recessed from the media facing surface. The magnetic write head includes a write pole, a trailing shield that is separated from the write pole by a non-magnetic trailing gap layer and a trailing magnetic return pole that is connected with the trailing magnetic shield. The trailing magnetic return pole and at least a portion of the trailing magnetic shield have surfaces that face the media facing surface. The surface of the trailing magnetic return pole and at least a portion of the surface of the trailing magnetic shield taper away from the media facing surface. This recess prevents far track interference by preventing stray magnetic fields from the trailing magnetic shield and trailing magnetic return pole from inadvertently affecting the magnetic media.
US09899045B2
A data reader may have a magnetoresistive stack consisting of at least magnetically free and magnetically fixed structures. The magnetically fixed structure can be set to a first magnetization direction by a first pinning structure separated from an air bearing surface by a front shield portion of a magnetic shield. The front shield portion may be set to a different second magnetization direction by a second pinning structure.
US09899044B2
The present invention addresses the problem of providing an element which uses the current-perpendicular-to-plane giant magnetoresistance (CPPGMR) effect of a thin film having the three-layer structure of ferromagnetic metal/non-magnetic metal/ferromagnetic metal. The problem is solved by a magnetoresistive element provided with a lower ferromagnetic layer and an upper ferromagnetic layer which contain a Heusler alloy, and a spacer layer sandwiched between the lower ferromagnetic layer and the upper ferromagnetic layer, the magnetoresistive element being characterized in that the spacer layer contains an alloy having a bcc structure. Furthermore, it is preferable for the alloy to have a disordered bcc structure.
US09899039B2
Disclosed is a method for determining alcohol consumption capable of analyzing alcohol consumption in a time domain by analyzing a formant slope of a voice signal, and a recording medium and a terminal for carrying out same. An terminal for determining whether a person is drunk comprises: a voice input unit for generating a voice frame by receiving a voice signal; a voiced/unvoiced sound analysis unit for determining whether a received voiced frame corresponds to a voiced sound; a formant frequency extraction unit for extracting a plurality of formant frequencies of the voice frame corresponding to the voiced sound; and an alcohol consumption determining unit for calculating a formant slope between the plurality of formant frequencies, and determining the state of alcohol consumption depending on the formant slope, thereby determining whether a person is drunk by analyzing the formant slope of an inputted voice.
US09899036B2
An audio identification system generates a reference audio fingerprint associated with an event. The reference audio fingerprint is generated from samples of an audio signal associated with the event captured by multiple devices. To generate the reference audio fingerprint, fingerprints are generated from each sample, and the generated fingerprints are temporally aligned. Fingerprints associated a temporally overlapping portion of the audio signal are averaged, and the average value is associated with the temporally overlapping portion of the audio signal and included in the reference audio fingerprint. The reference audio fingerprint is stored along with identifying information, such as an event name, an event time, an event date, or other information describing the event associated with the audio signal from which the samples were captured.
US09899035B2
A system for intelligent acoustic monitoring. The system includes a microphone to capture environmental acoustic data and a processor coupled to the microphone. The processor is configured to receive and perform acoustic analysis on the captured acoustic data to generate an acoustic signature, based on a result of the acoustic analysis, identify an event indicated by the acoustic signature, and perform a remedial action based on the identified event.
US09899026B2
The instant application includes computationally-implemented systems and methods that include managing adaptation data, wherein the adaptation data is correlated to at least one aspect of speech of a particular party, facilitating transmission of the adaptation data to a target device, wherein the adaptation data is configured to be applied to the target device to assist in execution of a speech-facilitated transaction, facilitating reception of adaptation result data that is based on at least one aspect of the speech-facilitated transaction between the particular party and the target device, determining whether to modify the adaptation data at least partly based on the adaptation result data, and facilitating transmission of at least a portion of modified adaptation data to a receiving device. In addition to the foregoing, other aspects are described in the claims, drawings, and text.
US09899015B2
Systems and methods for a digital instrument are described, for example to simulate or be used in conjunction with a stringed instrument. A sensor system detects the deflection of one or more strings of the digital instrument, produces a measurement of the detected deflection, correlates the measurement to a musical note, and produces at least a portion of digital output based upon the musical note.
US09899013B1
The invention pertains generally to an effects pedal employing multiple sub-buffers implementing a switching mechanism between forward and reverse delay effects, particularly useful in the music industry.
US09899010B2
This invention relates generally to an aid for playing a stringed instrument in the form of a glove comprising a plectrum protruding from the glove thumb tip and/or from one or more of the glove finger tips. The field of use in hand devices for playing stringed instruments. The aid for playing a stringed musical instrument, comprises: a glove with a glove thumb comprising a thumb plectrum rigidly connected to a rigid thumb portion of the glove thumb, wherein the rigid thumb portion encircles or partially encircles the glove thumb to hold the thumb plectrum snug on a thumb of the glove wearer.
US09899007B2
The device and method described in this application relate generally to graphics processing systems utilizing the tile based rendering technique and more specifically relate to the processing of the framebuffer data in graphics processing applications. The present invention discloses techniques to reduce the bandwidth needed to access the color data stored in the framebuffer. A method for adaptive lossy delta based compression of color data is disclosed. The error rate, that is the amount of color data lost during the lossy compression process, is controlled by various parameters of the rendered tiles produced by the graphics processing system. The compression process is driven by a dedicated unit which enables informed compression decisions with controllable error rate so as the output color data can be reliably decompressed to produce the original color data with minimal or no errors.
US09899003B2
A display system and a method for displaying items and/or performances is provided. At least a display panel is used to play multimedia content. In an embodiment, at least a portion of the display panel turns transparent for displaying items or performances in a display space. In an embodiment, the display item is moved in accordance with the multimedia played on the display panel. In an embodiment, light effects are adjusted during the display. In an embodiment, audio media is played and adjusted during the display.
US09898999B2
A method of operating a display driver IC (DDI) includes comparing previous line data with current line data and the R, G, and B components of a color data signals, and controlling whether to activate part of an intermediate processing circuit to process the current line data or more than a single component of the color data signal according to a comparison result.
US09898996B2
A display apparatus includes a display section configured to display, on a display surface, a screen of an application program running on an information processing apparatus, a detecting section configured to detect the position of a pointer, a drawing section configured to draw, when an operation mode of the display apparatus is a first mode, a line corresponding to a track of the position, a transmitting section configured to transmit, when the operation mode is a second mode, information indicating the position to the information processing apparatus, and an erasing section configured to erase the line when a first position of the pointer when the operation mode is the first mode is within a predetermined range including a first image object for performing an input to the application program on the screen and an instruction from a user for switching the operation mode to the second mode is received.
US09898987B2
A gate driving circuit is provided, where includes a plurality of gate driving units connected in cascade, each of the gate driving units is used to drive two scan lines arranged continuously, a gate driving signal of a first scan line and a first cascading signal are respectively transmitted by a first pull up module and a first down transmitting module, and a gate driving signal of a second scan line and a second cascading signal are respectively transmitted by a second pull up module and a second down transmitting module. By the above manner, the disclosure is capable of decreasing a component quantity of GOA circuit, thus achieving the ultra-narrow frame design.
US09898978B2
The present disclosure relates to a liquid crystal panel and the driving circuit. The liquid crystal panel includes a plurality of source driving circuits and a plurality of sub-pixel rows extending along a row direction. Each of the sub-pixel rows includes a plurality of sub-pixels of different colors and the sub-pixels are arranged periodically along the row direction. Within one scanning frame, polarity of driving voltage of at least one sub-pixel within the arranging period is opposite to that of other sub-pixels. Each of the source driving circuit includes at least two output ends respectively connecting to at least two sub-pixels having the same polarity of driving voltage within the same scanning frame to provide the driving voltage of the same polarity to the at least two sub-pixels. In this way, the power consumption of the source driving circuit may be reduced.
US09898973B2
The signal processing unit 20 includes a pixel index value calculating unit that calculates a pixel index value based on an input signal for each pixel 48, a chunk determining unit that performs consecutiveness determination which determines whether or not a pixel 48, having a pixel index value between an upper boundary value and a lower boundary value is consecutive from the starting pixel, and determines consecutive pixels as a chunk, a chunk index value calculating unit that calculates a chunk index value, a region index value calculating unit that calculates a region index value of a target region, and a light irradiation amount deciding unit that compares the chunk index value with the region index value, and decides the irradiation amount of the light of the light source unit in the target region based on the one by which the irradiation amount of the light is increased.
US09898970B2
A display device includes a data driver configured to generate a data signal based on a data voltage; a display panel configured to be driven based on a first power supply voltage and the data signal; a timing controller configured to control operations of the data driver and the display panel and configured to generate a ready signal indicating a power supply timing; a first voltage regulator configured to generate the first power supply voltage based on a first input voltage and a first enable signal; a second voltage regulator configured to generate the data voltage based on the first input voltage and a second enable signal; and a power sequence controller configured to generate the first enable signal based on the ready signal and the data voltage and configured to generate the second enable signal based on the ready signal and the first power supply voltage.
US09898965B2
The present disclosure provides a pixel driving circuit, a pixel driving method and a display apparatus. The pixel driving circuit includes a pre-charging control unit, a storage capacitor, a driving transistor and a threshold compensation unit. The pre-charging control unit charges the storage capacitor by a supply voltage during a pre-charging period; the threshold compensation unit during the threshold compensation period, together with the driving transistor and under the control of the control signal, controls the storage capacitor to be discharged until a voltage of the second electrode of the driving transistor becomes Vdata+Vth; and during a light-emitting period, control a gate-source voltage of the driving transistor to compensate for Vth, where Vth is a threshold voltage of the driving transistor, and Vdata is a voltage of the data signal.
US09898957B2
A display device with switchable viewing angle includes a first pixel and a second pixel. The first pixel has a first sub-pixel and a second sub-pixel. The second pixel has a third sub-pixel, a fourth sub-pixel and a fifth sub-pixel. The fifth sub-pixel is configured to be enabled when operating in a narrow viewing angle mode and to be disabled when operating in a wide viewing angle mode. When the fifth sub-pixel is enabled, each viewing angle of the first sub-pixel, the second sub-pixel, the third sub-pixel and the fourth sub-pixel is narrower than that when the fifth sub-pixel is disabled.
US09898956B2
A method of driving active-matrix organic light-emitting diode (AMOLED) panels includes: (A) dividing a current frame of a current image corresponding to an i-th color component into a plurality of sub-frames, wherein iε[1,N], and N is a total number of the color component; (B) obtaining a sequence of the sub-frames of a previous frame of a previous image corresponding to the i-th color component, wherein the previous frame has been divided into a plurality of sub-frames by the same way with the current frame; (C) determining the sequence of the sub-frames of the current frame in accordance with the sequence of the sub-frames of the previous frame, wherein the sequence of the sub-frames (SF) of the current image is same with or is different from that of the previous frame; and (D) controlling the panel to display in accordance with the sequence of the sub-frames of the current frame determined by corresponding color components.
US09898946B2
A magnetic scanning method includes acquiring an image from a storage device of a magnetic scanning device, controlling a magnetic read-write head of the magnetic scanning device to touch a reference point on a plane, generating an electric signal which reflects relevant information of the acquired image, inputting the electric signal reflecting the relevant information of the acquired image to the magnetic read-write head, when the electric signal reflecting the relevant information of the acquired image flows through the magnetic read-write head, controlling the magnetic read-write head to generate a magnetic field corresponding to the electric signal, controlling the magnetic read-write head to move and scan the plane from the reference point, to magnetize the magnetic powder on the plane by the magnetic field, and driving the magnetic powder to move relatively to generate an image similar to the acquired image.
US09898945B2
A display panel includes a substrate, a display area, N data lines, first switches, second switches, third switches, and fourth switches. A first peripheral circuit zone, a second peripheral circuit zone, and a display area are defined on a first surface of the substrate, and located between the first peripheral circuit zone and the second peripheral circuit zone. A display area circuit is located in the display area. Each of the N data lines crosses the display area circuit from the first peripheral circuit zone to the second peripheral circuit zone, and N is a positive integer greater than 1. The first switches are located in the first peripheral circuit zone. The second switches are located in the first peripheral circuit zone. The third switches are located on the first surface. The fourth switches are located in the second peripheral circuit zone.
US09898942B2
A hanging-strap information display device is a device provided in a hanging strap (10) including a hanging band part (11) hung in a movable body in a swingable manner and a hold part (12) provided on the hanging band part, and includes a display unit (14) disposed at a position that squarely faces a passenger that grips the hold part (12), a support shaft part (13) that supports the display unit (14) on the hanging band part (11) in a rotatable manner about a rotation center line, a weight (15) provided on a lower side in a vertical direction than the rotation center line of the display unit (14), and resonance reduction members (16, 17) that is connected between the hanging band part (11) and a position away from the rotation center line of the display unit (14) and reduces resonance of the display unit (14).
US09898938B1
Various embodiments provide a trifold letter card comprising a first riser portion, a second riser portion, a base portion, and an engaging portion. The engaging portion comprises at least three segments and at least two slits. Such structures allow the first riser portion to be inserted through the at least two slits and secured relative to the engaging portion.
US09898937B2
A model for practicing laparoscopic surgical skills is provided. The model includes a base having a plurality of practice stations at the upper surface. The practice stations include a cover having a first closed position in which a cavity is concealed beneath the cover and a second open position in which the cover is moved to uncover the cavity. The covers are connected to the surface in a number of ways to provide a variety of haptic responses useful in fine-tuning laparoscopic surgical skills. The cover is configured as a door hinged with or without a bias, a flexible flap, a sliding cover, a lid, and a penetrable sheet. An object for removal is hidden inside the cavity underneath the cover for practicing hand-to-hand transfer of instruments, use of both hands, switching instruments and determining and visualizing tissue planes in a laparoscopic environment.
US09898927B2
A Wi-Fi/radio frequency (RF) converting device includes a Wi-Fi transceiver, a multiplexing converting module, an RF transceiver, and an RF extension device. The Wi-Fi transceiver receives a Wi-Fi control signal from a control signal generator, wherein the Wi-Fi control signal contains at least one command. The multiplexing converting module receives the Wi-Fi control signal from the Wi-Fi transceiver, and converts the Wi-Fi control signal into a first wireless control signal or a second wireless control signal. The RF transceiver is electrically connected to the multiplexing converting module, and is connected to at least one electric appliance through RF signals. The RF transceiver receives the first wireless control signal from the multiplexing converting module, and transmits the RF control signal to the electric appliance. The RF extension device transmits the second wireless control signal, which corresponds to at least one another electric appliance, to the at least one another electric appliance.
US09898918B2
Belt wear of a treadmill is monitored. In one implementation, samples of electric current draw of a treadmill at different speeds of the treadmill belt of the treadmill are received. A value of each sample is differently weighted based on a speed of the treadmill belt at which the value of each sample was obtained. A belt wear notification is output based on the different weighted values of the samples.
US09898911B2
The inventive concept provides MIT devices molded by clear compound epoxy and fire detecting devices including the MIT device. The fire detecting device is supplied with a power source from a power control device. The fire detecting device includes a MIT device including a MIT chip molded by a clear compound epoxy, a diode bridge circuit supplied with the power source from the power control device for providing a non-polar power source, a notice circuit supplied with the non-polar power source from the diode bridge circuit for warning of a fire alarm in response to a detecting signal from the MIT device, and a stabilization circuit for maintaining the detecting signal for a certain period.
US09898905B1
A barrier that is releasably secured across an ingress/egress to a balcony or other elevated platform. The barrier is a fence-style assembly that has a pair of vertical posts that are releasably secured within respective boots secured to the floor. One of the boots includes a switch-activated transmitter that is inactive when the respective post is seated in the boot. If the post is pulled out of the boot, the switch-activated transmitter transmits a wireless signal to a transceiver located on the barrier which then transmits a signal to an on-site controller that transmits respective text messages to authorized personnel informing them of the barrier removal and restoration and will continue to do so until the barrier status changes. The transceiver may be housed within a housing that also contains a visual and/or audible warning at the barrier vicinity to warn those in the vicinity of the barrier removal.
US09898900B2
An automated banking machine operative to cause financial transfers responsive to data read from data bearing records. The automated banking machine includes a card reader that is operative to read card data from user cards corresponding to financial accounts. The automated banking machine is operative responsive to the card data to carry out transactions that transfer and/or allocate funds between accounts. The automated banking machine is further operative to provide users with a receipt for transactions conducted. The automated banking machine includes a cash dispenser operative to dispense cash to machine users and to cause the value of cash to be assessed to financial accounts corresponding to card data. The automated banking machine is further operative to receive currency bills or other sheets from a user and to process and store such sheets through operation of a currency accepting device. The account corresponding to card data may be credited for the value of bills or other sheets received.
US09898888B1
A method, apparatus, and computer readable storage to implement slot machine game that uses isometric symbols. The isometric symbols scroll on the screen in three-dimensions which also accommodate for hidden line removal. The game can be displayed on a traditional two-dimensional output device or an autostereoscopic display.
US09898869B2
Tactile virtual reality (VR) and/or mixed reality (MR) experiences are described. Techniques described herein include receiving data from a sensor and accessing a position and an orientation of a real object that is physically present in a real scene. Furthermore, techniques described herein include identifying the real object based at least in part on the position and the orientation of the real object and causing a graphical element corresponding to the real object to be rendered on a display of a VR and/or MR display device. The graphical element can be determined based at least in part on a VR and/or MR application. The techniques described herein include determining an interaction with the real object and causing a functionality associated with the graphical element to be performed in the VR or MR environment rendered via the VR and/or MR display device, respectively.
US09898866B2
Methods, systems, and computer readable media for low latency stabilization for head-worn displays are disclosed. According to one aspect, the subject matter described herein includes a system for low latency stabilization of a head-worn display. The system includes a low latency pose tracker having one or more rolling-shutter cameras that capture a 2D image by exposing each row of a frame at a later point in time than the previous row and that output image data row by row, and a tracking module for receiving image data row by row and using that data to generate a local appearance manifold. The generated manifold is used to track camera movements, which are used to produce a pose estimate.
US09898861B2
Systems and methods for projecting planar and 3D images through water or liquid onto a surface include creating a 3D model of the body of liquid and surface and 3D models of creative elements to be used in scenes. Animating the 3D models of the creative elements, placing them inside the 3D model of the body of liquid. Lighting the animated creative elements, rendering planar animations of the modeled creative elements and, using projection and texturing software, virtually projecting the planar animations back onto the surface of the 3D model of the body of liquid from the same camera position in order to “bake in” a warped transformation of the digitally rendered planar animations. Digitally rendering a 3D animation of the warped, transformed planar animations, and playing or looping the digitally rendered 3D animation through the body of liquid on a digital video player or digital server.
US09898848B2
Present application refers to a method, a model generation unit and a computer program (product) for generating trained models (M) of moving persons, based on physically measured person scan data (S). The approach is based on a common template (T) for the respective person and on the measured person scan data (S) in different shapes and different poses. Scan data are measured with a 3D laser scanner. A generic personal model is used for co-registering a set of person scan data (S) aligning the template (T) to the set of person scans (S) while simultaneously training the generic personal model to become a trained person model (M) by constraining the generic person model to be scan-specific, person-specific and pose-specific and providing the trained model (M), based on the co registering of the measured object scan data (S).
US09898847B2
The present disclosure provides a multimedia picture generating method, device and electronic device, wherein the multimedia picture generating method comprises acquiring a picture of a photographed subject of a photographing device; extracting a figure image as a foreground image from the picture after receiving an instruction for removing picture background; performing voice recognition after receiving a voice command inputted by a user; searching out multimedia content that matches a user command information recognized by voice recognition from a multimedia database as background content for the picture; and generating a multimedia picture that contains the foreground image and the background content. Thus, when a user wants to replace the picture background, a figure image can be automatically extracted from the picture as a foreground image, and the original background with poor effect can be removed, then an image and/or music that matches a user command information can be automatically searched out from a multimedia database, which increases the search efficiency, simplifies the optimum processing and improves the user experience.
US09898844B2
A system and method for augmented reality content adapted to changes in real world space geometry are described. A device captures an image of a local environment and maps a real world space geometry of the local environment using the image of the local environment. The device generates a visualization of a virtual object in the display relative to the mapped real world space geometry of the local environment. A content of the virtual object is adjusted to changes in the real world space geometry of the local environment.
US09898841B2
A method for operating a computing system is provided. The method includes at a local computing device and while an ink input is occurring, rendering a local uncommitted ink stroke on a local display based on the ink input and sending uncommitted ink data corresponding to the uncommitted ink stroke to a remote computing device, the uncommitted ink data including an uncommitted ink stroke path and a global unique identifier differentiating the uncommitted ink data from other uncommitted ink data corresponding to different computing devices and ink inputs. The method further includes responsive to receiving an ink stroke commitment input, rendering a local committed ink stroke on the local display and sending committed ink data including an ink commitment command and the global unique identifier associated with the uncommitted ink stroke path to the remote computing device.
US09898838B2
A method of determining a level of detail (LOD) for a texturing includes: acquiring texture coordinate data on pixels included in an upper block; determining a reference quad among quads included in the upper block; determining a similarity between the determined reference quad and the upper block using texture coordinates of the determined reference quad and the upper block; and determining LODs of remaining quads among the quads included in the upper block to be the same as an LOD of the determined reference quad in response to the determining of the similarity including determining that the determined reference quad and the upper block are similar.
US09898836B2
A method for automatic video face replacement includes steps of capturing a face image, detecting a rotation angle of the face image, defining a region to be replaced in the face image, and pasting a region to be replaced of one of the replaced images having the corresponding rotation angle of the face image into a target replacing region. Therefore, the region to be replaced of a static or dynamic face image can be replaced by a replaced image quickly by a single camera without requiring a manual setting of the feature points of a target image. These methods support face replacement at different angles and compensate the color difference to provide a natural look of the replaced image.
US09898833B1
An exemplary apparatus determines the dimensions of a package while being moved by a transport through a scanning zone. Sensors with different respective fields of view are disposed about a scanning zone and generate corresponding frames of 3-D images where some of the points represent the transport and package. A computing apparatus translates the points in the images into a transport coordinate system with a common point of origin on the transport so that the package does not appear to be in motion from frame to frame. The computing apparatus merges the translated points in different frames into a combined point cloud image and deletes points representing the transport resulting in a final point cloud image of the package. The computing apparatus determines the dimensions of the package based on the location of points representing the package in the final point cloud image.
US09898825B2
There is described herein an image segmentation technique using an iterative process. A contour, which begins with a single point that expands into a hollow shape, is iteratively deformed into a defined structure. As the contour is deformed, various constraints are applied to points along the contour to dictate its rate of change and direction of change are modified dynamically. The constraints may be modified after one or more iterations, at each point along the contour, in accordance with newly measured or determined data.
US09898822B2
A method reconstructs a scene as a three-dimensional (3D) model by first acquiring a sequence of images of the scene with a camera. Then, feature point matches or line matches are extracted from the sequence of images, variables for camera optical centers and 3D points are initialized using random values, and n copies of the variables are made depending on an availability of n constraints. The n copies are projected to satisfy each of the n constraints. Then, the n copies are replaced with averages of the copies and the projecting and the replacing are repeated until convergence to provide the 3D model.
US09898819B2
Disclosed is region of interest (ROI) detection apparatus and method. The ROI detection apparatus includes: a selecting criterion acquirer configured to acquire a selecting criterion; an image receiver configured to receive a current image; a suspicious area selector configured to select a part of the current image as a suspicious area according to the selecting criterion; and an ROI detector configured to detect an ROI from the suspicious area.
US09898816B2
A diagnosis assisting apparatus includes a display, an imaging unit configured to image a subject, a line of sight detecting unit configured to detect a line of sight direction of the subject from a picked-up image imaged by the imaging unit, a point of view detecting unit configured to detect a point of view of the subject in a display region of the display based on the line of sight direction, and an output controller configured to display a diagnostic image including a natural image and a geometrical image, and the point of view detecting unit detects the point of view of the subject in a case where the diagnostic image is displayed.
US09898799B2
An image processing method and an electronic device supporting the method are provided. The electronic device includes a processor having an image processing module processing an input image, and a memory, wherein the processor obtains image data that is processed for the input image, wherein the memory stores volatile information which is temporarily obtained from the image during an image processing process of the image processing module.
US09898797B2
Techniques pertaining to thermal management for smooth variation in display frame rate are described. A method may involve performing either or both of: (1) determining whether a temperature of at least one portion of an electronic apparatus exceeds a temperature threshold; and (2) determining whether a variation in a frame rate of images displayed on a display device associated with the electronic apparatus exceeds a variation threshold. The method may also involve controlling the frame rate in response to either or both of a first determination that the monitored temperature exceeds the temperature threshold and a second determination that the variation in the frame rate exceeds the variation threshold.
US09898795B2
Examples of the disclosure assign a plurality of graphics processing units (GPUs) to a plurality of virtual machines (VMs) or processes. A composite score is generated for each GPU. The composite score represents the normalized processing capabilities of the multiple GPUs. Based on a comparison between the composite scores and allocated quantum corresponding to a proportional amount of GPU resources to which each VM is entitled, each VM is assigned to at least one of the GPUs. Graphics commands from the VMs are scheduled for execution by the assigned GPUs.
US09898794B2
Examples allocate and schedule use of graphics processing unit (GPU) resources among a plurality of users executing virtual machines (VMs) or processes. During initialization, shares representing proportional access to the GPU resources are assigned and then adjusted based on graphics command characteristics. Quantum is allocated among the VMs based on the shares. At runtime, graphics commands from the VMs are queued and iteratively sent to the GPU based on a comparison between allocated quantum and a threshold quantum. In this manner, the GPU resources are fairly shared among the VMs.
US09898792B2
The present invention relates generally to digital watermarking. One aspect of the disclosure includes a method comprising: obtaining data representing imagery; using one or more configured processors, analyzing a plurality of portions of the data to detect a watermark orientation component, said analyzing employing a match filter, in which the match filter yields a correlation value for each of the plurality of portions; determining a first portion from the plurality of portions that comprises a correlation value meeting a predetermined value; and directing a watermark decoder at the first portion to decode a plural-bit watermark payload, in which the watermark decoder produces a watermark signature for the first portion, and in which the watermark decoder searches a plurality of areas at or around the first portion to decode the plural-bit watermark payload. Of course, many other aspects and disclosure are provided in this patent document.
US09898787B2
A computer implemented method optimizes a utility plant having multiple devices to convert input energy into output energy for a building. The method includes dividing a utility plant scheduling interval into several control intervals and for each control interval, obtaining a difference between a desired and a measured in-building condition controlled by output power from the utility plant, obtaining current values of multiple factors that influence operation of the utility plant, determining a new power demand of the building expected to decrease the difference, and finding set points for the multiple devices that satisfy the new power demand, take into account response times of the devices and their capacities, and optimize utility plant operation costs.
US09898767B2
A platform facilitates buyers, sellers, and third parties in obtaining information related to each other's transaction histories, such as a supplier's shipment history, the types of materials typically shipped, a supplier's customers, a supplier's expertise, what materials and how much a buyer purchases, buyer and shipper reliability, similarity between buyers, similarity between suppliers, and the like. The platform aggregates data from a variety of sources, including, without limitation, customs data associated with actual import/export transactions, non-public shipper records, and facilitates the generation of reports as to the quality of buyers and suppliers, the reports relating to a variety of parameters that are associated with buyer and supplier quality.
US09898763B1
A system receives geographic information from devices to determine and deliver relevant advertisements or personalized content for consumers. This ties a user's real-world location, with virtual leads (e.g., advertisements). The system uses geographical information gathered by mobile devices and saves the geographical information to consumer profiles. For example, the system can use different wireless radios present on mobile devices to gather different types of geographical information. Some radios include cellular, Bluetooth, global positioning system (or GPS), Wi-Fi, near field communications (or NFC), and other radios.
US09898758B2
Methods and systems for generating a content item associated with search results and, based on a subsequent return to the search results, providing the content item in a modified manner.
US09898754B2
A system to measure effectiveness of displayed content includes a video processing service configured to receive and process a stream of video images captured by one or more video cameras, a display application service configured to produce display content to be displayed on one or more display monitors and to capture user interactions with the displayed content, and a display effectiveness service configured to correlate data received from the video processing service and the display application service and generate a display effectiveness measurement that is a measure of an effectiveness of the displayed content for specific periods of time.
US09898752B2
A point storage unit stores points, which are imparted to the user in an electronic commerce, in association with user identification information. A link request receiving unit receives a link request for linking user identification information and membership card identification information for identifying a membership card for receiving points imparted at an actual shop. In a case where the link request is received, a link information storage unit stores link information indicating a link between the user identification information and the membership card identification information. In a case where a point use request with a designation of the membership card identification information is received, a use permission unit permits use of the points stored in association with the user identification information linked to the membership card identification information.
US09898751B1
This disclosure describes systems and methods related to providing direct purchase of merchandise from an electronic communication and subsequent delivery of the purchased merchandise. A direct merchandise purchase system may generate an electronic communication associated with an offer for merchandise for a user. The user may be able to directly purchase merchandise from the electronic communication which may then be delivered accordingly.
US09898749B2
A computer-implemented method is disclosed herein. The method includes the step of positioning at least one location marker at a position in a retail store. The method also includes the step of receiving, with a processing device of a position detection server, a video signal from an electronic device possessed by a consumer as the consumer shops in the retail store. At least one image frame of the video signal contains the at least one location marker. The method also includes the step of determining, with the processing device, a location of the consumer within the retail store in response to the receiving step.
US09898744B2
In some embodiments, an apparatus includes a tag that may include an encapsulant and a plurality of three-dimensional objects randomly oriented within the encapsulant. Each three-dimensional object may include a plurality of characteristics defining at least one statistically unique signature. At least one of the characteristics may be dependent on the orientation of the object. In some instances, the plurality of three-dimensional objects may also be randomly distributed within the encapsulant, and at least one of the characteristics defining at least one statistically unique signature may be dependent on the distribution of the objects.
US09898742B2
A method and system are provided to facilitate recognition of gestures representing commands to initiate actions within an electronic marketplace on behalf of a user. Spatial data about an environment external to a depth sensor may be received by an action machine. The action machine may generate a first model of a body of the user based on a first set of spatial data received at a first time. The action machine may then generate a second model of the body of the user based on a second set of spatial data received at a second time. The action machine may further determine that a detected difference between the first and second models corresponds to a gesture by the user, and that this gesture represents a command by the user to initiate an action within the electronic marketplace on behalf of the user.
US09898741B2
Improved real-time analytics systems are provided. An analytics system may be used to generate transaction scores for transactions. A method may comprise receiving a scoring request associated with a transaction, sending the scoring request to a plurality of scoring models including a production model, wherein each scoring model is operable to generate a transaction score in response to the scoring request, and wherein each scoring model may be implemented using a virtual machine, receiving a transaction score generated by the production model, and sending the transaction score to a server for approval or denial the transaction.
US09898738B2
Each of a plurality of consumer accounts in a data store has a first consumer account identifier. Login information is received from a consumer device over the network interface device. The first consumer account identifier is received from the consumer device and stored in association the consumer account. The first consumer account identifier is storable as one of at least two types of identifiers and the storing by the consumer device of the first consumer account identifier is only permitted upon successful login based on the login information. The charge request is received over a network interface device, the charge request including the amount and the second consumer account identifier. A selected one of the consumer accounts is identified by associating one of the first consumer account identifiers with the second consumer account identifier, and the charge request is processed based on an account detail of the selected consumer account.
US09898732B2
Methods and systems may provide for generating a virtual transaction card based on a card value and one or more mobile usage constraints including a time bounded policy, wherein the virtual transaction card is invalid if the time bounded policy is not satisfied. Additionally, the virtual transaction card may be transmitted to a delegate mobile device. Other mobile usage constraints, such as location bounded policies and type of transaction policies may also be used.
US09898727B2
A server receives a card ID of a credit card, a credit amount, and a terminal ID for identifying a shop terminal from a shop terminal. The server acquires a corresponding user ID from the card ID, to find out whether this user has approved that location information can be acquired from his/her mobile terminal. In the case where the user has approved that location information is acquired in advance, the server acquires a mobile phone number from the user ID, to know a location of the mobile terminal with use of this mobile phone number. The server acquires a shop ID from the terminal ID (fixed-line telephone number) of the shop terminal, to be able to acquire a shop location from the shop ID. The server compares the location of the mobile terminal and the location of the shop, to judge whether or not conformance is made.
US09898720B2
An apparatus and methods for a card that allows a cardholder to set up auto-charge payment of dues and fees to a series of clubs, merchants or service providers. The card also may be used for other transactions that accept credit cards. The apparatus includes a database containing information of the associated clubs, merchants and service providers, so that applicants and cardholders can easily configure auto-charging for multiple business concerns in one sitting. The apparatus may process auto-charge transactions in an automated fashion without requiring a cardholder to submit payment authorization or the business concern to submit a charge for each payment. Inconvenience and administrative costs to the cardholder and the business concern are reduced. The system and method provide a competitive advantage to the associated business concerns to secure the initial account and then to maintain it. The system and method encourages card loyalty of both the card members and the business concerns to the card provider.
US09898718B2
Providing a requisite level of service for an electronic meeting. An embodiment can include receiving a request to schedule a first electronic meeting in a time slot, identifying an electronic meeting system to host the first electronic meeting, identifying a second electronic meeting scheduled to be hosted by the electronic meeting system in the time slot, determining an estimate of resource usage within the electronic meeting system during the time slot at least based on the second electronic meeting being scheduled to be hosted by the electronic meeting system in the time slot, comparing the estimate of resource usage with a threshold value, responsive to determining that the estimate of resource usage exceeds the threshold value, providing the requisite level of service to the first electronic meeting in the time slot by reducing anticipated resource usage of the electronic meeting system by the second electronic meeting.
US09898714B2
A system for a direct social network comprises a first device and a second device. The first device of the social network includes a first contact list. The first contact list includes a first plurality of users. The second device of the social network includes a second contact list. The second list includes a second plurality of users. The first device directly requests data from the second device when a user of the second device is one of the first plurality of users. The second device transmits the requested data when the user of the first device is one of the second plurality of users.
US09898712B2
A method and apparatus for providing information along a shelf edge of a retailer is described. On a display configured to be oriented along an edge of a shelf of a retailer, a first user interface including first information about a first product on the shelf is provided. At least one second user interface including at least one second information about at least one second product on the shelf is provided on the display. An individual is permitted to edit a parameter of the first user interface and/or the at least one second user interface. The parameter may include at least one of: a size of the user interface on the display, a shape of the user interface on the display, and a location of the user interface on the display. The first information and the at least one second information may be outputted concurrently to the display.
US09898702B2
An apparatus for managing decision support related events and solutions includes a plurality of case management elements. Each of the case management elements is in communication with at least an associated one of a corresponding plurality of portal access controllers associated with a corresponding unit within an organization. Each of the case management elements includes at least a corresponding one of a plurality of solution elements. Each of the solution elements is configured to receive solution information from the at least one corresponding portal access controller and to communicate the solution information only with each other one of the solution elements. The solution information comprises data regarding a decision support related event associated with a case associated with the corresponding unit.
US09898697B2
A support device, which supports a belt-shaped sheet wound around a hollow cylindrical shaft core so as to feed the belt-shaped sheet, includes a support shaft that is insertable into a hollow part of the shaft core, a frame that supports the support shaft, an antenna surface perpendicular to an axis line of the support shaft, and a loop antenna provided to the antenna surface. The shaft core includes a non-contact data carrier capable of at least one of storing and transmitting predetermined data. The loop antenna includes a loop unit coiled to define a loop surrounding the axis line. When the shaft core is seen through the loop antenna along the axis line, the loop unit is disposed in the vicinity of the shaft core.
US09898692B2
A printing apparatus includes a first receiving unit, an obtaining unit, a sending unit, a second receiving unit, and a setting unit. The first receiving unit receives, from a printing control apparatus, an instruction to obtain first attribute information of a sheet held in a sheet holding unit. The obtaining unit obtains the first attribute information in accordance with the instruction received by the first receiving unit. The sending unit sends the first attribute information obtained by the obtaining unit to the printing control apparatus. The second receiving unit receives, from the printing control apparatus, second attribute information based on the first attribute information sent from the sending unit. The setting unit sets the second attribute information, received by the second receiving unit, as attribute information of a sheet held in the sheet holding unit.
US09898690B2
A device controls at least one of a machine, a color measurement device or an inspection system of the graphic arts industry. The device contains a control console that has at least one screen for displaying at least one of machine information, color information or image information. The control console includes a plurality of sensors for detecting gestures of an operator who operates the machine, the color measurement device or the inspection system via the control console.
US09898685B2
Aspects of the subject disclosure may include, for example, a method for determining a first set of features in first images of first media content, generating a similarity score by processing the first set of features with a favorability model derived by identifying generative features and discriminative features of second media content that is favored by a viewer, and providing the similarity score to a network for predicting a response by the viewer to the first media content. Other embodiments are disclosed.
US09898673B2
A biometrics authentication device is configured so as to include: a PLDI (Principal-Line Dependent Index) generating unit that extracts directional features that respectively correspond to directions different from each other from an image, and generates a PLDI (Principal-Line Dependent Index) indicating dependency of a principal line on the basis of the directional features; a PLDI (Principal-Line Dependent Index) matching processing unit that determines a second degree of similarity between the PLDI and a registered PLDI; and a determining unit that determines identity by using a first degree of similarity.
US09898671B2
A vision system of a vehicle includes a camera disposed at the vehicle and having a field of view exterior of the vehicle. A control has an image processor that is operable, via image processing of frames of image data captured by the camera, to detect an object present in the field of view of the camera. When the vehicle is moving, the control, responsive at least in part to vehicle motion information and image processing of frames of captured image data, determines motion of the detected object relative to the moving vehicle. The control determines the relative motion of the detected object by (i) determining corresponding object points in at least two frames of captured image data, (ii) estimating object motion trajectory of the detected object responsive to the determination of corresponding object points and (iii) determining the structure of the detected object along the estimated object motion trajectory.
US09898667B2
An accident information management apparatus for acquiring accident associated information such as images stored in a black box (i.e., black box images) from a peripheral vehicle through direct communication between vehicles when an accident such as a traffic accident occurs, a vehicle including the accident information management apparatus, and a method for managing accident information are disclosed. The vehicle includes an antenna array having a plurality of antenna elements configured to transmit and receive a signal; and a beamformer configured to adjust a phase of the signal transmitted from the antenna elements so as to form a beam pattern focused in a specific direction; and a controller configured to focus the beam pattern onto a peripheral vehicle so as to control a communication unit to transmit a request signal of accident associated information. The antenna array and the beamformer are contained in the communication unit.
US09898665B2
A computer-implemented method for dynamically creating and presenting video content information to a user of a computer having an associated screen involves: i) loading contents of a video file into a video player; ii) displaying frames of the video file; iii) receiving a user's input indicating selection of an object displayed in at least one frame; iv) performing an object identification analysis of frames to locate each instance where a specific frame contains the object; v) for each specific frame that contains the object, performing a z-axis analysis of the object to determine prominence of the object within each specific frame; vi) storing metadata indicating results of the object identification analysis and, for frames where the object was present, the z-axis analysis; and vii) automatically generating and displaying a graphical timeline display graphically reflecting frames containing the object and object prominence within those frames based upon the metadata.
US09898663B2
A wearable apparatus is provided for capturing and processing images from an environment of a user. In one implementation, a system for facilitating collaboration between individuals includes a transceiver and at least one processing device. The at least one processing device is programmed to obtain and analyze one or more images captured by an image sensor included in a wearable apparatus. The at least one processing device is further programmed to detect, by the analysis, a visual trigger in an environment of a wearer of the wearable apparatus. The visual trigger may be associated with a collaborative action to be taken. The at least one processing device may be further programmed to use the transceiver to transmit an indicator relating to the visual trigger associated with the collaborative action to be taken.
US09898657B2
The invention discloses a four-dimensional code, an image identification system and an image identification method based on the four-dimensional code, a retrieval system and a retrieval method. All the conceives of the invention are mainly based on the four-dimensional code which includes an identification image and a group of recognition data corresponding to the identification image, wherein the identification image includes a true color image, a two-dimensional code, a color overlaid on the two-dimensional code, and an ID No., and the true color image, the two-dimensional code, the color overlaid on the two-dimensional code and the ID No. have same or corresponding indexes. Data corresponding to the four-dimensional code is stored through a server, and the four-dimensional code or the identification image is scanned during identification or retrieval, so that corresponding data can be retrieved through image identification processing, and returned to a mobile terminal. The invention has high identification precision and broad application range, and can be applied to various commercial purposes.
US09898656B2
The invention provides a method of monitoring a subject's neurological condition. In some embodiments, the method includes the steps of analyzing a physiological signal (such as an EEG) from a subject to determine if the subject is in a contra-ictal condition; and if the subject is in a contra-ictal condition, providing an indication (e.g., to the subject and/or to a caregiver) that the subject is in the contra-ictal condition, such as by activating a green light or other visible output. In some embodiments, if the subject is in a pro-ictal condition, the method includes the step of providing an indication (such as a red light) that the subject is in the pro-ictal condition. The invention also provides neurological system monitors.
US09898652B2
Provided is a vehicle including a storage unit that stores a vein pattern lookup table including a plurality of reference vein pattern images according to a rotation angle of a driver's hand. The vehicle also includes an image acquisition unit that acquires a driver's image including an image of the driver's hand. The vehicle also includes a controller that extracts a vein pattern image of the driver's hand from the driver's image, authenticates the driver by comparing the vein pattern image with the vein pattern lookup table, and determines a gesture of the driver including at least one of a position of the driver's hand, a direction directed by the driver's hand and a rotation angle of the driver's hand based on the vein pattern image.
US09898649B2
The disclosure discloses a face authentication method and device. The face authentication method includes: acquiring multiple face training images; extracting Gabor features of the multiple face training images; extracting Pattern of Oriented Edge Magnitude (POEM) features of the multiple face training images; fusing the Gabor features of the multiple face training image and the POEM features of the multiple face training image to acquire positive samples and negative samples of the multiple face training images; training the positive samples and negative samples of the multiple face training images to obtain training results by an AdaBoost algorithm; and performing face authentication by the training results. By the disclosure, the problem of difficulty of a face authentication method in the related technology in combination of efficiency and recognition rate is solved, and the effects of improving feature extraction efficiency of face recognition and increasing the face recognition rate are further achieved.
US09898647B2
A system for detecting, identifying and tracking objects of interest over time is configured to derive object identification data from images captured from one or more image capture devices. In some embodiments of the system, the one or more image capture devices perform a first object detection and identification analysis on images captured by the one or more image capture devices. The system may then transmit the captured images to a server that performs a second object detection and identification analysis on the captures images. In various embodiments, the second analysis is more detailed than the first analysis. The system may also be configured to compile data from the one or more image capture devices and server into a timeline of object of interest detection and identification data over time.
US09898644B2
A touch panel with fingerprint identification function includes a glass substrate, a fingerprint identification device, a packaging layer, an optical adhesive layer and a sealing layer. The glass substrate has a visible section, a non-visible section and a first plane face. The non-visible section is formed with a recess having a bottom side. The fingerprint identification device is disposed in the recess, having a substrate having a first side. A silicon substrate is disposed on the first side and electrically connected to the substrate via a wire. Multiple fingerprint identification chips are disposed on one side of the silicon substrate. The packaging layer encloses the wire, the substrate and an exposed section of the silicon substrate. The optical adhesive layer is disposed between the fingerprint identification device and the bottom side of the recess. The sealing layer seals the fingerprint identification device in the recess of the glass substrate.
US09898642B2
An electronic device with a display and a fingerprint sensor displays a fingerprint enrollment interface and detects, on the fingerprint sensor, a plurality of finger gestures performed with a finger. The device collects fingerprint information from the plurality of finger gestures performed with the finger. After collecting the fingerprint information, the device determines whether the collected fingerprint information is sufficient to enroll a fingerprint of the finger. When the collected fingerprint information for the finger is sufficient to enroll the fingerprint of the finger, the device enrolls the fingerprint of the finger with the device. When the collected fingerprint information for the finger is not sufficient to enroll the fingerprint of the finger, the device displays a message in the fingerprint enrollment interface prompting a user to perform one or more additional finger gestures on the fingerprint sensor with the finger.
US09898640B2
There is provided a capacitive fingerprint sensing device for sensing a fingerprint pattern of a finger, the capacitive fingerprint sensing device comprising: a protective dielectric top layer having an outer surface forming a sensing surface to be touched by the finger; at least one electrically conductive sensing structure arranged underneath the top layer; readout circuitry coupled to the at least one electrically conductive sensing structure to receive a sensing signal indicative of a distance between the finger and the sensing structure; and a plurality of individually controllable electroacoustic transducers arranged underneath the top layer and configured to generate a focused ultrasonic beam, and to transmit the ultrasonic beam through the protective dielectric top layer towards the sensing surface to induce an ultrasonic vibration potential in a ridge of finger placed in contact with the sensing surface at the location of the ultrasonic beam.
US09898637B2
Disclosed is a two-dimensional code which is not likely to be affected by contamination or out-of-focus photographing thereof and can thus be accurately recognized even when it is photographed under various photographing conditions. The disclosed two-dimensional code comprises: cells representing binary-coded data that are arranged as a pattern in the form of a two-dimensional matrix, the two-dimensional code comprising: a position detection pattern; plural data blocks created by dividing a region of the two-dimensional matrix that excludes the part of the position detection pattern; and a separation space arranged between the plural data blocks that are adjacent.
US09898636B2
A wrapper for a terahertz wave according to an embodiment of the present invention includes: a terahertz wave transmission layer that is made of a material that transmits a terahertz wave; and an electric field enhancement structure that enhances an electric field by reacting with a predetermined frequency band of terahertz waves passing through the terahertz wave transmission layer. An optical identification device for a terahertz wave according to an embodiment of the present invention includes m identification units composed of: a terahertz wave transmission layer that is made of a material that transmits a terahertz wave; and a waveguide grating that resonates at a natural resonant frequency when receiving the transmitted terahertz wave, in which the natural resonant frequency is any one of a first natural resonant frequency to an n-th natural resonant frequency.
US09898626B1
Embodiments for using location defined power charge management authorization for a user equipment (UE) by a processor. A power charging session is authorized by firmware of the UE for charging the UE upon detecting the UE is within an authorized geographic location.
US09898624B2
A multi-core processor based key protection method and system is described. An Operating System (OS) supporting Symmetric Multi-Processing (SMP) is set up on a multi-core processor. One core of the multi-core processor is configured as a cryptographic operation core, which is prohibited from running other processes of the OS and dedicated to perform a public-key cryptographic operation. The private key and an intermediate variable in a process of the public-key cryptographic operation are stored in a cache exclusively occupied by the cryptographic operation core.
US09898616B2
Techniques for simulating exclusive use of a processor core amongst multiple logical partitions (LPARs) include providing hardware thread-dependent status information in response to access requests by the LPARs that is reflective of exclusive use of the processor by the LPAR accessing the hardware thread-dependent information. The information returned in response to the access requests is transformed if the requestor is a program executing at a privilege level lower than the hypervisor privilege level, so that each logical partition views the processor as though it has exclusive use of the processor. The techniques may be implemented by a logical circuit block within the processor core that transforms the hardware thread-specific information to a logical representation of the hardware thread-specific information or the transformation may be performed by program instructions of an interrupt handler that traps access to the physical register containing the information.
US09898611B2
A method of transmitting high speed serial data with reduced levels of radiated emissions is disclosed. A transmitting device scrambles data utilizing a pseudo-random number sequence generator. Scrambling the data eliminates transmission of repeated data sequences. The transmitting device similarly scrambles idle pairs of data between data transmissions to eliminate an additional source of repeated data sequences. The scrambled and encoded data is transmitted to a receiving device. The receiving device also includes a pseudo-random number sequence generator. Synchronization of the two pseudo-random number sequence generators occurs by utilizing control characters of the data frame being transmitted. Each of the pseudo-random number sequence generators is configured to generate the same sequence of numbers and is initialized to start with a first number in the sequence of numbers corresponding to the first byte of data being transmitted or received.
US09898607B2
A template for implementing a control system with security features provides a generic control program and device programs for distribution to one or more industrial controllers and associated control devices together with matching security programs for distribution to the control devices, the security programs providing for the generation of security thumbprints indicating the state of the control devices. The template may also be associated with a security-monitoring program that can receive and process the security thumbprints.
US09898602B2
Methods, devices and systems for detecting suspicious or performance-degrading mobile device behaviors intelligently, dynamically, and/or adaptively determine computing device behaviors that are to be observed, the number of behaviors that are to be observed, and the level of detail or granularity at which the mobile device behaviors are to be observed. The various aspects efficiently identify suspicious or performance-degrading mobile device behaviors without requiring an excessive amount of processing, memory, or energy resources. Various aspects may correct suspicious or performance-degrading mobile device behaviors. Various aspects may prevent identified suspicious or performance-degrading mobile device behaviors from degrading the performance and power utilization levels of a mobile device over time. Various aspects may restore an aging mobile device to its original performance and power utilization levels.