本发明实施例之扩散阻障层系提供形成一铜扩散阻障层的机制，以避免因晶圆混成接合造成组件衰退。扩散阻障层系包围用于混成接合制程的含铜导电垫。扩散阻障层可位于两个接合芯片的其中之一上或位于两个接合芯片上。

The embodiments of diffusion barrier layer described above provide mechanisms for forming a copper diffusion barrier layer to prevent device degradation for hybrid bonding of wafers. The diffusion barrier layer(s) encircles the copper-containing conductive pads used for hybrid bonding. The diffusion barrier layer can be on one of the two bonding wafers or on both bonding wafers.