- 专利标题: Methods and systems to control power gates during an active state of a gated domain based on load conditions of the gated domain
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申请号: US14350548申请日: 2011-12-27
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公开(公告)号: US10228738B2公开(公告)日: 2019-03-12
- 发明人: Michael Zelikson , Vjekoslav Svilan , Norbert Unger , Shai Rotem
- 申请人: Michael Zelikson , Vjekoslav Svilan , Norbert Unger , Shai Rotem
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Green, Howard & Mughal LLP
- 国际申请: PCT/US2011/067334 WO 20111227
- 国际公布: WO2013/100890 WO 20130704
- 主分类号: G06F1/00
- IPC分类号: G06F1/00 ; G06F1/26 ; H03K17/687 ; G06F1/3234 ; G06F1/3287
摘要:
Methods and systems to adjust a resistance between a supply grid and a power-gated grid during an active state of a power-gated circuitry in response to load changes in the circuitry to maintain a relatively consistent IR droop. Subsets of power gates (PGs) may be selectively enabled and disabled based on changes in a load factor, such as a voltage, which may be monitored at a gated power distribution grid and/or proximate to a transistor gate within the power-gated circuitry. The adjusting may be performed to minimize a difference between the monitored voltage and a reference, such as with successive approximation or CMS software. PG subsets may be distributed within one or more layers of an integrated circuit (IC) die and may be selectively enabled/disabled based on location. PGs may be embedded within lower layers of an integrated circuit (IC) die, such as within metal layers of the IC die.
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