Invention Grant
- Patent Title: Extra doped region for back-side deep trench isolation
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Application No.: US15919784Application Date: 2018-03-13
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Publication No.: US10276618B2Publication Date: 2019-04-30
- Inventor: Chun-Yuan Chen , Ching-Chun Wang , Dun-Nian Yaung , Hsiao-Hui Tseng , Jhy-Jyi Sze , Shyh-Fann Ting , Tzu-Jui Wang , Yen-Ting Chiang , Yu-Jen Wang , Yuichiro Yamashita
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L31/00
- IPC: H01L31/00 ; H01L27/146

Abstract:
The present disclosure, in some embodiments, relates to a CMOS image sensor. The CMOS image sensor has an image sensing element disposed within a substrate. A plurality of isolation structures are arranged along a back-side of the substrate and are separated from opposing sides of the image sensing element by non-zero distances. A doped region is laterally arranged between the plurality of isolation structures. The doped region is also vertically arranged between the image sensing element and the back-side of the substrate. The doped region physically contacts the image sensing element.
Public/Granted literature
- US20180204862A1 EXTRA DOPED REGION FOR BACK-SIDE DEEP TRENCH ISOLATION Public/Granted day:2018-07-19
Information query
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