Invention Grant
- Patent Title: Conductive feature formation and structure using bottom-up filling deposition
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Application No.: US15920727Application Date: 2018-03-14
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Publication No.: US10475702B2Publication Date: 2019-11-12
- Inventor: Pin-Wen Chen , Chia-Han Lai , Chih-Wei Chang , Mei-Hui Fu , Ming-Hsing Tsai , Wei-Jung Lin , Yu Shih Wang , Ya-Yi Cheng , I-Li Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/535 ; H01L21/3213 ; H01L21/285

Abstract:
The present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In some embodiments, a structure includes a first dielectric layer over a substrate, a first conductive feature through the first dielectric layer, the first conductive feature comprising a first metal, a second dielectric layer over the first dielectric layer, and a second conductive feature through the second dielectric layer having a lower convex surface extending into the first conductive feature, wherein the lower convex surface of the second conductive feature has a tip end extending laterally under a bottom boundary of the second dielectric layer.
Public/Granted literature
- US20190287851A1 Conductive Feature Formation and Structure Using Bottom-Up Filling Deposition Public/Granted day:2019-09-19
Information query
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