Invention Grant
- Patent Title: Textured test pads for printed circuit board testing
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Application No.: US16424270Application Date: 2019-05-28
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Publication No.: US10893605B2Publication Date: 2021-01-12
- Inventor: Michael Richard Fabry , William Bradford Green
- Applicant: Seagate Technology LLC
- Applicant Address: US CA Cupertino
- Assignee: Seagate Technology LLC
- Current Assignee: Seagate Technology LLC
- Current Assignee Address: US CA Cupertino
- Agency: Kagan Binder, PLLC
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H05K1/11 ; H05K1/18 ; H05K7/02 ; H05K7/06 ; G01R1/067 ; G01R1/073 ; G01R31/00 ; G01R31/02 ; G01R31/26 ; G01R31/28 ; H01L21/00 ; H01L21/02 ; H01L21/44 ; H01L21/60 ; H01L21/66 ; H01L21/70 ; H01L21/82 ; H01L23/00 ; H01L23/48 ; H01L23/58 ; H01L23/544 ; H05K3/24

Abstract:
A printed circuit board includes a substrate and at least one electrical circuit provided at least partially on a surface layer of the printed circuit board. The electrical circuit includes an electrical trace that is in electrical connection with a test pad provided for accessibility on the surface layer, the test pad being sized and shaped for probing to test an aspect of the circuit, the test pad having a conductive probe surface that is structured to provide at least one vertical surface that extends from the probe surface toward the surface layer and thus providing an edge between the vertical surface and the probe surface, the probe surface having a coating of a material to protect the conductive probe surface from corrosion.
Public/Granted literature
- US20200383203A1 TEXTURED TEST PADS FOR PRINTED CIRCUIT BOARD TESTING Public/Granted day:2020-12-03
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