Invention Grant
- Patent Title: Structure and formation method of semiconductor device structure with nanowires
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Application No.: US16528768Application Date: 2019-08-01
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Publication No.: US10991811B2Publication Date: 2021-04-27
- Inventor: Chao-Ching Cheng , Wei-Sheng Yun , Shao-Ming Yu , Tsung-Lin Lee , Chih-Chieh Yeh
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/762 ; H01L29/06 ; H01L29/423 ; H01L29/775 ; H01L29/78 ; H01L29/786 ; B82Y10/00 ; H01L29/08 ; H01L27/06 ; H01L27/092 ; H01L21/822 ; H01L21/8234 ; H01L29/417 ; H01L29/40 ; H01L29/165

Abstract:
A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a plurality of nanowires over an input-output region, and a protective layer surrounding the nanowires. The protective layer is made of silicon, silicon germanium, silicon oxide, silicon nitride, silicon sulfide, or a combination thereof. The semiconductor device structure also includes a high-k dielectric layer surrounding the protective layer, and a gate electrode surrounding the high-k dielectric layer. The semiconductor device structure further includes a source/drain portion adjacent to the gate electrode, and an interlayer dielectric layer over the source/drain portion.
Public/Granted literature
- US20190355835A1 STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE WITH NANOWIRES Public/Granted day:2019-11-21
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