- 专利标题： Gate resistance improvement and method thereof
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申请号： US16287368申请日： 2019-02-27
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公开(公告)号： US11031500B2公开(公告)日： 2021-06-08
- 发明人: Ju-Li Huang , Chun-Sheng Liang , Ming-Hsi Yeh , Ying-Liang Chuang , Hsin-Che Chiang , Chun-Ming Yang , Yu-Chi Pan
- 申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址： TW Hsinchu
- 专利权人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址： TW Hsinchu
- 代理机构： Sterne, Kessler, Goldstein & Fox, P.L.L.C.
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L29/423 ; H01L21/285 ; H01L29/40 ; H01L21/3213 ; H01L29/49
摘要：
The present disclosure describes structure and method of a fin field-effect transistor (finFET) device. The finFET device includes: a substrate, a fin over the substrate, and a gate structure over the fin. The gate structure includes a work-function metal (WFM) layer over an inner sidewall of the gate structure. A topmost surface of the WFM layer is lower than a top surface of the gate structure. The gate structure also includes a filler gate metal layer over the topmost surface of the WFM layer. A top surface of the filler gate metal layer is substantially co-planar with the top surface of the gate structure. The gate structure further includes a self-assembled monolayer (SAM) between the filler gate metal layer and the WFM layer.
公开/授权文献
- US20200044073A1 GATE RESISTANCE IMPROVEMENT AND METHOD THEREOF 公开/授权日：2020-02-06
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