- 专利标题: Method, apparatus, and system for energy efficiency and energy conservation including power and performance balancing between multiple processing elements and/or a communication bus
-
申请号: US16421647申请日: 2019-05-24
-
公开(公告)号: US11106262B2公开(公告)日: 2021-08-31
- 发明人: Travis T. Schluessler , Russell J. Fenger
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Trop, Pruner & Hu, P.C.
- 主分类号: G06F1/32
- IPC分类号: G06F1/32 ; G06F1/3206 ; G06F1/20 ; G06F1/3287 ; G06F1/329 ; G06F9/50 ; G06F1/3203 ; G06F1/3234
摘要:
An apparatus, method and system is described herein for efficiently balancing performance and power between processing elements based on measured workloads. If a workload of a processing element indicates that it is a bottleneck, then its performance may be increased. However, if a platform or integrated circuit including the processing element is already operating at a power or thermal limit, the increase in performance is counterbalanced by a reduction or cap in another processing elements performance to maintain compliance with the power or thermal limit. As a result, bottlenecks are identified and alleviated by balancing power allocation, even when multiple processing elements are operating at a power or thermal limit.
公开/授权文献
信息查询