Invention Grant
- Patent Title: Semiconductor device with integrated memory devices and MOS devices and process of making the same
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Application No.: US17229848Application Date: 2021-04-13
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Publication No.: US11444095B2Publication Date: 2022-09-13
- Inventor: Wang Xiang , Chia-Ching Hsu , Shen-De Wang , Weichang Liu
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/66 ; H01L27/092 ; H01L27/11568 ; H01L27/11573 ; H01L21/02 ; H01L21/28 ; H01L29/49 ; H01L21/3213 ; H01L21/027 ; H01L29/78 ; H01L29/51 ; H01L21/8238 ; H01L21/311

Abstract:
A semiconductor device with integrated memory devices and metal-oxide-semiconductor (MOS) devices, including a substrate with a first area and a second area, multiple double-diffused metal-oxide-semiconductor (DMOS) devices on the first area, wherein the double-diffused metal-oxide-semiconductor (DMOS) device includes a field oxide on the substrate, a first gate dielectric layer adjacent to the field oxide, and a first polysilicon gate on the field oxide and the first gate dielectric layer, and multiple memory units on the second area, wherein the memory unit includes an oxide-nitride-oxide (ONO) tri-layer and a second polysilicon gate on the oxide-nitride-oxide (ONO) tri-layer, wherein a top surface of the second polysilicon gate of the memory unit in the second area and a top surface of the first polysilicon gate of the double-diffused metal-oxide-semiconductor (DMOS) in the first area are on the same level.
Public/Granted literature
- US20210233924A1 SEMICONDUCTOR DEVICE WITH INTEGRATED MEMORY DEVICES AND MOS DEVICES AND PROCESS OF MAKING THE SAME Public/Granted day:2021-07-29
Information query
IPC分类: