Invention Grant
- Patent Title: Diffusion barrier layer for source and drain structures to increase transistor performance
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Application No.: US17064811Application Date: 2020-10-07
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Publication No.: US11522049B2Publication Date: 2022-12-06
- Inventor: Kuei-Ming Chen , Chi-Ming Chen , Chung-Yi Yu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L29/08
- IPC: H01L29/08 ; H01L21/84 ; H01L27/088 ; H01L27/12 ; H01L29/167 ; H01L29/66 ; H01L21/02 ; H01L29/06 ; H01L29/786 ; H01L29/165 ; H01L29/775 ; H01L29/78 ; H01L21/8238 ; H01L27/092

Abstract:
Various embodiments of the present disclosure are directed towards a semiconductor device including a gate electrode over a semiconductor substrate. An epitaxial source/drain layer is disposed on the semiconductor substrate and is laterally adjacent to the gate electrode. The epitaxial source/drain layer comprises a first dopant. A diffusion barrier layer is between the epitaxial source/drain layer and the semiconductor substrate. The diffusion barrier layer comprises a barrier dopant that is different from the first dopant.
Public/Granted literature
- US20210336006A1 DIFFUSION BARRIER LAYER FOR SOURCE AND DRAIN STRUCTURES TO INCREASE TRANSISTOR PERFORMANCE Public/Granted day:2021-10-28
Information query
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