Invention Grant
- Patent Title: Method for manufacturing a three-dimensional memory
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Application No.: US17012848Application Date: 2020-09-04
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Publication No.: US11532640B2Publication Date: 2022-12-20
- Inventor: Han-Jong Chia , Chung-Te Lin , Feng-Cheng Yang , Meng-Han Lin , Sheng-Chen Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L27/11597
- IPC: H01L27/11597 ; G11C11/56 ; H01L27/11587 ; G11C11/22 ; H01L21/28 ; H01L27/1159 ; H01L29/78

Abstract:
In an embodiment, a device includes: a first dielectric layer over a substrate; a word line over the first dielectric layer, the word line including a first main layer and a first glue layer, the first glue layer extending along a bottom surface, a top surface, and a first sidewall of the first main layer; a second dielectric layer over the word line; a first bit line extending through the second dielectric layer and the first dielectric layer; and a data storage strip disposed between the first bit line and the word line, the data storage strip extending along a second sidewall of the word line.
Public/Granted literature
- US20210375927A1 Three-Dimensional Memory Device and Method Public/Granted day:2021-12-02
Information query
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