Invention Grant
- Patent Title: Forming bonding structures by using template layer as templates
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Application No.: US16915312Application Date: 2020-06-29
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Publication No.: US11594484B2Publication Date: 2023-02-28
- Inventor: Mirng-Ji Lii , Chung-Shi Liu , Chin-Yu Ku , Hung-Jui Kuo , Alexander Kalnitsky , Ming-Che Ho , Yi-Wen Wu , Ching-Hui Chen , Kuo-Chio Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/522 ; H01L23/31 ; H01L23/00 ; H01L21/48 ; H01L21/768 ; H01L23/528 ; H01L23/532
Abstract:
A method includes forming a first dielectric layer over a conductive pad, forming a second dielectric layer over the first dielectric layer, and etching the second dielectric layer to form a first opening, with a top surface of the first dielectric layer exposed to the first opening. A template layer is formed to fill the first opening. A second opening is then formed in the template layer and the first dielectric layer, with a top surface of the conductive pad exposed to the second opening. A conductive pillar is formed in the second opening.
Public/Granted literature
- US20200328153A1 Forming Bonding Structures By Using Template Layer as Templates Public/Granted day:2020-10-15
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