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公开(公告)号：US11855028B2
公开(公告)日：2023-12-26
申请号：US17326941
申请日：2021-05-21
发明人： Ting-Li Yang , Po-Hao Tsai , Yi-Wen Wu , Sheng-Pin Yang , Hao-Chun Liu
IPC分类号： H01L23/498 , H01L21/48 , H01L23/00 , H01L49/02 , H01L23/522
CPC分类号： H01L24/14 , H01L21/4853 , H01L23/49811 , H01L23/5226 , H01L24/10 , H01L24/17 , H01L28/60
摘要： A semiconductor device includes a substrate; an interconnect structure over the substrate; a first passivation layer over the interconnect structure; a first conductive pad, a second conductive pad, and a conductive line disposed over the first passivation layer and electrically coupled to conductive features of the interconnect structure; a conformal second passivation layer over and extending along upper surfaces and sidewalls of the first conductive pad, the second conductive pad, and the conductive line; a first conductive bump and a second conductive bump over the first conductive pad and the second conductive pad, respectively, where the first conductive bump and the second conductive bump extend through the conformal second passivation layer and are electrically coupled to the first conductive pad and the second conductive pad, respectively; and a dummy bump over the conductive line, where the dummy bump is separated from the conductive line by the conformal second passivation layer.
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公开(公告)号：US20220359489A1
公开(公告)日：2022-11-10
申请号：US17869968
申请日：2022-07-21
发明人： Yi-Wen Wu , Po-Yao Chuang , Meng-Liang Lin , Techi Wong , Shih-Ting Hung , Po-Hao Tsai , Shin-Puu Jeng
摘要： Packaged devices and methods of manufacturing the devices are described herein. The packaged devices may be fabricated using heterogeneous devices and asymmetric dual-side molding on a multi-layered redistribution layer (RDL) structure. The packaged devices may be formed with a heterogeneous three-dimensional (3D) Fan-Out System-in-Package (SiP) structure having small profiles and can be formed using a single carrier substrate.
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公开(公告)号：US20210225776A1
公开(公告)日：2021-07-22
申请号：US16921907
申请日：2020-07-06
发明人： Yi-Wen Wu , Shin-Puu Jeng , Shih-Ting Hung , Po-Yao Chuang
IPC分类号： H01L23/552 , H01L23/538 , H01L25/16 , H01L23/31 , H01L25/00 , H01L21/48 , H01L21/56
摘要： A package structure includes a redistribution structure, a first semiconductor die, a first passive component, a second semiconductor die, a first insulating encapsulant, a second insulating encapsulant, a second passive component and a global shielding structure. The redistribution structure includes dielectric layers and conductive layers alternately stacked. The first semiconductor die, the first passive component and the second semiconductor die are disposed on a first surface of the redistribution structure. The first insulating encapsulant is encapsulating the first semiconductor die and the first passive component. The second insulating encapsulant is encapsulating the second semiconductor die, wherein the second insulating encapsulant is separated from the first insulating encapsulant. The second passive component is disposed on a second surface of the redistribution structure. The global shielding structure is surrounding the first insulating encapsulant, the second insulating encapsulant, and covering sidewalls of the redistribution structure.
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公开(公告)号：US20190096802A1
公开(公告)日：2019-03-28
申请号：US15716476
申请日：2017-09-26
发明人： Yi-Wen Wu , Hung-Jui Kuo , Ming-Che Ho
IPC分类号： H01L23/522 , H01L23/00 , H01L23/532 , H01L21/768
摘要： Provided is an integrated fan-out package including a die, an insulating encapsulation, a redistribution circuit structure, a conductive terminal, and a barrier layer. The die is encapsulated by the insulating encapsulation. The redistribution circuit structure includes a redistribution conductive layer. The redistribution conductive layer is disposed in the insulating encapsulation and extending from a first surface of the insulating encapsulation to a second surface of the insulating encapsulation. The conductive terminal is disposed over the second surface of the insulating encapsulation. The barrier layer is sandwiched between the redistribution conductive layer and the conductive terminal. A material of the barrier layer is different from a material of the redistribution conductive layer and a material of the conductive terminal. A method of fabricating the integrated fan-out package is also provided.
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公开(公告)号：US11855014B2
公开(公告)日：2023-12-26
申请号：US17120825
申请日：2020-12-14
发明人： Chen-Hua Yu , Ming-Che Ho , Hung-Jui Kuo , Yi-Wen Wu , Tzung-Hui Lee
IPC分类号： H01L23/498 , H01L23/00 , H01L21/66 , H01L23/538
CPC分类号： H01L24/02 , H01L22/14 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/27 , H01L24/73 , H01L23/49811 , H01L23/49816 , H01L23/5389 , H01L24/03 , H01L24/16 , H01L24/29 , H01L24/32 , H01L2224/0215 , H01L2224/02125 , H01L2224/02185 , H01L2224/02315 , H01L2224/02375 , H01L2224/02379 , H01L2224/0345 , H01L2224/0401 , H01L2224/05008 , H01L2224/05024 , H01L2224/05558 , H01L2224/05569 , H01L2224/10125 , H01L2224/11009 , H01L2224/1147 , H01L2224/11462 , H01L2224/13018 , H01L2224/13026 , H01L2224/13147 , H01L2224/16227 , H01L2224/26125 , H01L2224/27009 , H01L2224/2747 , H01L2224/27462 , H01L2224/29018 , H01L2224/29036 , H01L2224/29147 , H01L2224/32227 , H01L2224/48091 , H01L2224/48227 , H01L2224/73203 , H01L2224/94 , H01L2924/15311 , H01L2924/181 , H01L2924/181 , H01L2924/00012 , H01L2224/73203 , H01L2924/00012 , H01L2224/48091 , H01L2924/00014 , H01L2224/1147 , H01L2924/00014 , H01L2224/0215 , H01L2924/06 , H01L2224/0345 , H01L2924/00014 , H01L2224/94 , H01L2224/11 , H01L2224/94 , H01L2224/03 , H01L2224/94 , H01L2224/27
摘要： A semiconductor device and method of manufacturing is provided, whereby a support structure is utilized to provide additional support for a conductive element in order to eliminate or reduce the formation of a defective surface such that the conductive element may be formed to have a thinner structure without suffering deleterious structures.
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公开(公告)号：US11824007B2
公开(公告)日：2023-11-21
申请号：US17690206
申请日：2022-03-09
发明人： Po-Hao Tsai , Po-Yao Chuang , Meng-Liang Lin , Yi-Wen Wu , Shin-Puu Jeng , Techi Wong
IPC分类号： H01L23/538 , H01L21/48 , H01L21/56 , H01L21/768 , H01L23/00
CPC分类号： H01L23/5384 , H01L21/4885 , H01L21/56 , H01L21/76802 , H01L23/5385 , H01L23/5386 , H01L24/14
摘要： A semiconductor package is fabricated by attaching a first component to a second component. The first component is assembled by forming a first redistribution structure over a substrate. A through via is then formed over the first redistribution structure, and a die is attached to the first redistribution structure active-side down. The second component includes a second redistribution structure, which is then attached to the through via. A molding compound is deposited between the first redistribution structure and the second redistribution structure and further around the sides of the second component.
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公开(公告)号：US20230061716A1
公开(公告)日：2023-03-02
申请号：US17707481
申请日：2022-03-29
发明人： Yen-Kun Lai , Yi-Wen Wu , Kuo-Chin Chang , Po-Hao Tsai , Mirng-Ji Lii
IPC分类号： H01L23/00
摘要： Semiconductor devices and methods of manufacturing are provided, wherein a first passivation layer is deposited over a top redistribution structure; a second passivation layer is deposited over the first passivation layer; and a first opening is formed through the second passivation layer. After the forming the first opening, the first opening is reshaped into a second opening; a third opening is formed through the first passivation layer; and filling the second opening and the third opening with a conductive material.
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公开(公告)号：US11430776B2
公开(公告)日：2022-08-30
申请号：US16902017
申请日：2020-06-15
发明人： Yi-Wen Wu , Po-Yao Chuang , Meng-Liang Lin , Techi Wong , Shih-Ting Hung , Po-Hao Tsai , Shin-Puu Jeng
摘要： Packaged devices and methods of manufacturing the devices are described herein. The packaged devices may be fabricated using heterogeneous devices and asymmetric dual-side molding on a multi-layered redistribution layer (RDL) structure. The packaged devices may be formed with a heterogeneous three-dimensional (3D) Fan-Out System-in-Package (SiP) structure having small profiles and can be formed using a single carrier substrate.
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公开(公告)号：US20220199541A1
公开(公告)日：2022-06-23
申请号：US17690206
申请日：2022-03-09
发明人： Po-Hao Tsai , Po-Yao Chuang , Meng-Liang Lin , Yi-Wen Wu , Shin-Puu Jeng , Techi Wong
IPC分类号： H01L23/538 , H01L21/48 , H01L21/56 , H01L23/00 , H01L21/768
摘要： A semiconductor package is fabricated by attaching a first component to a second component. The first component is assembled by forming a first redistribution structure over a substrate. A through via is then formed over the first redistribution structure, and a die is attached to the first redistribution structure active-side down. The second component includes a second redistribution structure, which is then attached to the through via. A molding compound is deposited between the first redistribution structure and the second redistribution structure and further around the sides of the second component.
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公开(公告)号：US11101214B2
公开(公告)日：2021-08-24
申请号：US16380502
申请日：2019-04-10
发明人： Po-Hao Tsai , Techi Wong , Meng-Liang Lin , Yi-Wen Wu , Po-Yao Chuang , Shin-Puu Jeng
IPC分类号： H01L23/495 , H01L23/528 , H01L23/00 , H01L23/31 , H01L25/00 , H01L25/065 , H01L23/498 , H01L23/538 , H01L25/07
摘要： A package structure and method for forming the same are provided. The package structure includes a die structure formed over a first interconnect structure, and the die structure includes a first region and a second region. The package structure includes a dam structure formed on the first region of the die structure, and a second interconnect structure formed over the die structure and the dam structure. The package structure also includes a package layer formed between the first interconnect structure and the second interconnect structure, and the package layer is formed on the second region of the die structure to surround the dam structure.
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