Invention Grant
- Patent Title: On-die aging measurements for dynamic timing modeling
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Application No.: US16232023Application Date: 2018-12-25
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Publication No.: US11609262B2Publication Date: 2023-03-21
- Inventor: Dheeraj Subbareddy , Ankireddy Nalamalpu , Mahesh A. Iyer , Dhananjay Raghavan
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: InventIQ Legal LLP
- Main IPC: G01R31/26
- IPC: G01R31/26 ; G01R31/317 ; G01R31/3193 ; G01R31/28 ; G01R31/30 ; G01R31/3185

Abstract:
An integrated circuit die includes a core fabric configurable to include an aging measurement circuit and a device manager coupled to the core fabric to operate the aging measurement circuit for a select period of time. The aging measurement circuit includes a counter to count transitions of a signal propagating through the aging measurement circuit during the select period of time when the aging measurement circuit is operating. The transitions of the signal counted by the counter during the select period of time are a measure of an aging characteristic of the integrated circuit die.
Public/Granted literature
- US20190146028A1 On-Die Aging Measurements for Dynamic Timing Modeling Public/Granted day:2019-05-16
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