Invention Grant
- Patent Title: Layout design of dual row select structure
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Application No.: US17066277Application Date: 2020-10-08
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Publication No.: US11652131B2Publication Date: 2023-05-16
- Inventor: Sang Joo Lee , Rui Wang , Hiroaki Ebihara , Tiejun Dai , Hiroki Ui
- Applicant: OMNIVISION TECHNOLOGIES, INC.
- Applicant Address: US CA Santa Clara
- Assignee: OmniVision Technologies, Inc.
- Current Assignee: OmniVision Technologies, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Perkins Coie LLP
- Main IPC: H01L27/146
- IPC: H01L27/146 ; H04N5/378 ; H04N5/374 ; H01L27/148 ; H04N9/04 ; H04N5/347 ; H04N5/3745

Abstract:
A pixel array includes pixel cells disposed in semiconductor material. Each of the pixel cells includes photodiodes, and a floating diffusion to receive image charge from the photodiodes. A source follower is coupled to the floating diffusion to generate an image signal in response image charge from the photodiodes. Drain regions of first and second row select transistors are coupled to a source of the source follower. A common junction is disposed in the semiconductor material between gates of the first and second row select transistors such that the drains of the first and second row select transistors are shared and coupled together through the semiconductor material of the common junction. The pixel cells are organized into a rows and columns with bitlines.
Public/Granted literature
- US20210358994A1 LAYOUT DESIGN OF DUAL ROW SELECT STRUCTURE Public/Granted day:2021-11-18
Information query
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