- 专利标题: Voltage bin calibration based on a temporary voltage shift offset
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申请号: US17820792申请日: 2022-08-18
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公开(公告)号: US11823748B2公开(公告)日: 2023-11-21
- 发明人: Kishore Kumar Muchherla , Karl Schuh , Mustafa N Kaynak , Xiangang Luo , Shane Nowell , Devin Batutis , Sivagnanam Parthasarathy , Sampath Ratnam , Jiangang Wu , Peter Feeley
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Lowenstein Sandler LLP
- 主分类号: G11C16/34
- IPC分类号: G11C16/34 ; G11C16/30 ; G11C16/10 ; G11C7/04 ; G11C16/32 ; G11C16/26
摘要:
A voltage shift for memory cells of a block family at a memory device is measured. The block family is associated with a first voltage offset. An adjusted amount of voltage shift is determined for the memory cells based on the measured voltage shift and a temporary voltage shift offset associated with a difference between a current temperature and a prior temperature for the memory device. The block family is associated with a second voltage offset in view of the adjusted voltage shift.
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