Invention Grant
- Patent Title: Fabrication of gate-all-around integrated circuit structures having molybdenum nitride metal gates and gate dielectrics with a dipole layer
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Application No.: US17030350Application Date: 2020-09-23
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Publication No.: US12051698B2Publication Date: 2024-07-30
- Inventor: Daniel G. Ouellette , Daniel B. O'Brien , Jeffrey S. Leib , Orb Acton , Lukas Baumgartel , Dan S. Lavric , Dax M. Crum , Oleg Golonzka , Tahir Ghani
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C.
- Main IPC: H01L27/00
- IPC: H01L27/00 ; H01L27/092 ; H01L29/06 ; H01L29/40 ; H01L29/423 ; H01L29/49 ; H01L29/51 ; H01L29/775

Abstract:
Gate-all-around integrated circuit structures having molybdenum nitride metal gates and gate dielectrics with a dipole layer are described. For example, an integrated circuit structure includes a first vertical arrangement of horizontal nanowires, and a second vertical arrangement of horizontal nanowires. A first gate stack is over the first vertical arrangement of horizontal nanowires, the first gate stack having a P-type conductive layer on a first gate dielectric. The P-type conductive layer includes molybdenum and nitrogen. A second gate stack is over the second vertical arrangement of horizontal nanowires, the second gate stack having an N-type conductive layer on a second gate dielectric.
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