发明申请
- 专利标题： Method of manufacturing a semiconductor device and a fabrication apparatus for a semiconductor device
- 专利标题（中）： 半导体装置的制造方法以及半导体装置的制造装置
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申请号： US10983689申请日： 2004-11-09
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公开(公告)号： US20050064612A1公开(公告)日： 2005-03-24
- 发明人: Akio Ishizu , Kazutoshi Takashima , Shiro Oba , Yoshihiko Kobayashi , Tsutomu Ida , Shigeru Haga , Susumu Takada , Iwamichi Koujiro , Norinaga Arai , Yuji Kakegawa
- 申请人： Akio Ishizu , Kazutoshi Takashima , Shiro Oba , Yoshihiko Kobayashi , Tsutomu Ida , Shigeru Haga , Susumu Takada , Iwamichi Koujiro , Norinaga Arai , Yuji Kakegawa
- 专利权人： Renesas Technology Corp.
- 当前专利权人： Renesas Technology Corp.
- 优先权： WOPCT/JP00/00828 20000215; JP2000-036821 20000215
- 主分类号： G01R31/26
- IPC分类号： G01R31/26 ; H01L21/50 ; H01L21/58 ; H01L21/66 ; H01L21/98 ; H01L23/04 ; H01L23/10 ; H01L23/13 ; H01L23/498 ; H01L23/50 ; H01L23/544 ; H01L25/16
摘要：
A method of manufacturing a semiconductor device able to reduce the number of manufacturing steps and attain the rationalization of a manufacturing line is disclosed. The semiconductor device is a high-frequency module assembled by mounting chip parts (22) and semiconductor pellets (21) onto each of wiring substrates (2) formed on a matrix substrate (27) after inspection. A defect mark (2e) is affixed to a wiring substrate (2) as a block judged to be defective in the inspection of the matrix substrate (27), then in a series of subsequent assembling steps the defect mark (e) is recognized and the assembling work for the wiring substrate (2) with the defect mark (2e) thereon is omitted to attain the rationalization of a manufacturing line.