发明申请
- 专利标题: SEMICONDUCTOR DEVICE CONDUCTIVE PATTERN STRUCTURES INCLUDING DUMMY CONDUCTIVE PATTERNS, AND METHODS OF MANUFACTURING THE SAME
- 专利标题(中): 半导体器件导电图案结构,包括导电图案及其制造方法
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申请号: US13237514申请日: 2011-09-20
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公开(公告)号: US20120193792A1公开(公告)日: 2012-08-02
- 发明人: Hei-Seung Kim , In-Sun Park , Gil-Heyun Choi , Ji-Soon Park , Jong-Myeong Lee , Jong-Won Hong
- 申请人: Hei-Seung Kim , In-Sun Park , Gil-Heyun Choi , Ji-Soon Park , Jong-Myeong Lee , Jong-Won Hong
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 优先权: KR10-2011-0009342 20110131
- 主分类号: H01L23/48
- IPC分类号: H01L23/48 ; H01L21/768
摘要:
Methods of forming conductive pattern structures form an insulating interlayer on a substrate that is partially etched to form a first trench extending to both end portions of a cell block. The insulating interlayer is also partially etched to form a second trench adjacent to the first trench, and a third trench extending to the both end portions of the cell block. The second trench has a disconnected shape at a middle portion of the cell block. A seed copper layer is formed on the insulating interlayer. Inner portions of the first, second and third trenches are electroplated with a copper layer. The copper layer is polished to expose the insulating interlayer to form first and second conductive patterns in the first and second trenches, respectively, and a first dummy conductive pattern in the third trench. Related conductive pattern structures are also described.
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