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    METHOD OF FORMING A TITANIUM ALUMINUM NITRIDE LAYER AND METHOD OF MANUFACTURING A PHASE-CHANGE MEMORY DEVICE USING THE SAME
    5.
    发明申请
    METHOD OF FORMING A TITANIUM ALUMINUM NITRIDE LAYER AND METHOD OF MANUFACTURING A PHASE-CHANGE MEMORY DEVICE USING THE SAME 审中-公开
    形成钛酸铝层的方法和使用其制造相变存储器件的方法

    公开(公告)号：US20080194106A1

    公开(公告)日：2008-08-14

    申请号：US12030662

    申请日：2008-02-13

    Applicant: Gyu-Hwan OH ,  In-Sun PARK ,  Hyun-Seok LIM ,  Nak-Hyun LIM

    Inventor： Gyu-Hwan OH ,  In-Sun PARK ,  Hyun-Seok LIM ,  Nak-Hyun LIM

    IPC: H01L21/44

    CPC classification number: H01L21/28562 ,  C23C16/34 ,  C23C16/45531 ,  H01L21/76877 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/143 ,  H01L45/144 ,  H01L45/16 ,  H01L45/1675

    Abstract: In a method of forming a titanium aluminum nitride layer, a first reactant is formed on a substrate by reacting a first source including titanium and a second source including nitrogen. A second reactant is formed by providing a third source including aluminum onto the substrate having the first reactant thereon and reacting the third source with the first reactant. A third reactant is formed by providing a fourth source including nitrogen onto the substrate having the second reactant thereon and reacting the fourth source with the second reactant. The titanium aluminum nitride layer having a good step coverage is formed on the substrate. Processes of forming the titanium aluminum nitride layer are simplified and deposition rate is improved. Therefore, a phase-change memory device using the titanium aluminum nitride layer as a lower electrode may have an improved throughput.

    Abstract translation: 在形成氮化铝钛层的方法中，通过使包括钛的第一源和包括氮的第二源反应，在基板上形成第一反应物。 通过在其上具有第一反应物的基底上提供包括铝的第三源，并使第三源与第一反应物反应形成第二反应物。 通过在其上具有第二反应物的衬底上提供包括氮的第四源，并使第四源与第二反应物反应形成第三反应物。 在基板上形成具有良好阶梯覆盖的氮化铝钛层。 形成氮化铝钛层的工艺简化，沉积速率提高。 因此，使用氮化铝钛层作为下电极的相变存储器件可以具有提高的生产量。

    METHOD OF FORMING A BARRIER METAL LAYER OF A SEMICONDUCTOR DEVICE
    6.
    发明申请
    METHOD OF FORMING A BARRIER METAL LAYER OF A SEMICONDUCTOR DEVICE 审中-公开
    形成半导体器件的栅极金属层的方法

    公开(公告)号：US20080003815A1

    公开(公告)日：2008-01-03

    申请号：US11770619

    申请日：2007-06-28

    Applicant: Hyun-Suk LEE ,  Hyun-Seok LIM ,  Rak-Hwan KIM ,  In-Sun PARK

    Inventor： Hyun-Suk LEE ,  Hyun-Seok LIM ,  Rak-Hwan KIM ,  In-Sun PARK

    IPC: H01L21/44

    CPC classification number: H01L21/7687 ,  H01L21/28556 ,  H01L27/24

    Abstract: Provided is a method of forming a barrier metal layer of a semiconductor device. In the method, a barrier metal layer is formed on a top surface of a semiconductor substrate and then an electrode layer is formed on the semiconductor substrate. Forming the barrier metal layer includes performing a cyclic process repeatedly at least twice. The cyclic process includes depositing a titanium layer and nitriding the deposited titanium layer.

    Abstract translation: 提供一种形成半导体器件的阻挡金属层的方法。 在该方法中，在半导体衬底的顶表面上形成阻挡金属层，然后在半导体衬底上形成电极层。 形成阻挡金属层包括重复执行循环过程至少两次。 循环过程包括沉积钛层并氮化沉积的钛层。

    SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME
    7.
    发明申请
    SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME 审中-公开
    半导体存储器件及其制造方法

    公开(公告)号：US20070272950A1

    公开(公告)日：2007-11-29

    申请号：US11753291

    申请日：2007-05-24

    Applicant: Rak-Hwan KIM ,  Kyung-Chang RYOO ,  In-Sun PARK ,  Yoon-Jong SONG ,  Hyeon-Deok LEE ,  Hyun-Seok LIM

    Inventor： Rak-Hwan KIM ,  Kyung-Chang RYOO ,  In-Sun PARK ,  Yoon-Jong SONG ,  Hyeon-Deok LEE ,  Hyun-Seok LIM

    IPC: H01L27/10

    CPC classification number: H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1273 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1666

    Abstract: A method of fabricating a semiconductor memory device includes forming a first insulating layer and a sacrificial layer on a substrate. The first insulating layer and the sacrificial layer have an opening therein. A first conductive layer is formed in the opening and on the sacrificial layer. A second insulating layer is formed on the first conductive layer. The second insulating layer, the first conductive layer and the sacrificial layer are then planarized until the first insulating layer is exposed, thereby forming a first conductive pattern and a second insulating layer pattern in the opening. A phase change material layer is formed on the first conductive pattern, the first insulating layer and the second insulating layer pattern. A second conductive pattern is formed on the phase change material layer. A semiconductor memory device and a data processing system adopting the semiconductor memory device are also provided.

    Abstract translation: 制造半导体存储器件的方法包括在衬底上形成第一绝缘层和牺牲层。 第一绝缘层和牺牲层在其中具有开口。 在开口和牺牲层上形成第一导电层。 在第一导电层上形成第二绝缘层。 然后将第二绝缘层，第一导电层和牺牲层平坦化直到第一绝缘层露出，从而在开口中形成第一导电图案和第二绝缘层图案。 在第一导电图案，第一绝缘层和第二绝缘层图案上形成相变材料层。 在相变材料层上形成第二导电图案。 还提供了半导体存储器件和采用半导体存储器件的数据处理系统。

    Cryogenic refrigerator including separating device
    8.
    发明申请
    Cryogenic refrigerator including separating device 审中-公开
    低温冰箱包括分离装置

    公开(公告)号：US20070074522A1

    公开(公告)日：2007-04-05

    申请号：US11512345

    申请日：2006-08-30

    Applicant: Choon-dong Kim ,  Hyun-man Jang ,  In-sun Park ,  Ig-saeng Kim ,  Do-hyung Kim

    Inventor： Choon-dong Kim ,  Hyun-man Jang ,  In-sun Park ,  Ig-saeng Kim ,  Do-hyung Kim

    IPC: F25B9/00

    CPC classification number: F25B9/14 ,  F25B2309/001

    Abstract: A cryogenic refrigerator has a separating device provided between a lower temperature portion and a heat exchanger to selectively separate the lower temperature portion and the heat exchanger, and thus to selectively block heat transfer between the lower temperature portion and the heat exchanger. According to the cryogenic refrigerator, it can have an ability to perform a maintenance operation of the cryogenic refrigerator at normal temperature by blocking heat transfer from the lower temperature portion to the heat exchanger during maintenance after disassembly.

    Abstract translation: 低温冷冻机具有设置在下部温度部和热交换器之间的分离装置，以选择性地分离下部温度部和热交换器，从而选择性地阻止下部温度部和热交换器之间的热传递。 根据低温冰箱，能够通过在拆卸后的维护期间阻止从低温部向热交换器的热传递而在常温下进行低温冷冻机的维护操作。

    Methods of fabricating integrated circuit conductive contact structures including grooves
    9.
    发明授权
    Methods of fabricating integrated circuit conductive contact structures including grooves 有权
    制造集成电路导电接触结构包括沟槽的方法

    公开(公告)号：US07122468B2

    公开(公告)日：2006-10-17

    申请号：US11039562

    申请日：2005-01-20

    Applicant: Ju-Cheol Shin ,  Hyeon-Deok Lee ,  Hong-Mi Park ,  In-Sun Park

    Inventor： Ju-Cheol Shin ,  Hyeon-Deok Lee ,  Hong-Mi Park ,  In-Sun Park

    IPC: H01L21/4763

    CPC classification number: H01L27/10894 ,  H01L21/76877 ,  H01L23/5226 ,  H01L27/10817 ,  H01L27/10885 ,  H01L27/10897 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An integrated circuit includes a substrate and a first insulating layer on the substrate that includes a first hole including a floor and a sidewall. A first conductive contact extends conformally on the sidewall and floor to define a groove in the first hole. A second insulating layer is provided on the first insulating layer and includes a second hole that exposes the groove. A second conductive contact is provided in the second hole and in the groove. These integrated circuits are fabricated by forming a first insulating layer on a substrate that includes a first hole including a floor and a sidewall. A first conductive contact is conformally formed on the sidewall and floor to define a groove in the first hole. A second insulating layer is formed on the first insulating layer and includes a second hole that exposes the groove. A second conductive contact is formed in the second hole and in the groove.

    Abstract translation: 集成电路包括衬底和衬底上的第一绝缘层，其包括包括地板和侧壁的第一孔。 第一导电接触件在侧壁和底板上保形地延伸以在第一孔中限定凹槽。 第二绝缘层设置在第一绝缘层上，并且包括露出槽的第二孔。 在第二孔和凹槽中设置第二导电接触。 这些集成电路通过在基板上形成第一绝缘层来制造，所述第一绝缘层包括包括地板和侧壁的第一孔。 第一导电接触共形地形成在侧壁和地板上以在第一孔中限定凹槽。 第二绝缘层形成在第一绝缘层上，并且包括暴露槽的第二孔。 在第二孔和槽中形成第二导电接触。

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