Invention Application
- Patent Title: FRACTIONAL-N SYNTHESIZER WITH PRE-MULTIPLICATION
- Patent Title (中): 具有预处理功能的合成N合成器
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Application No.: US14709759Application Date: 2015-05-12
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Publication No.: US20150326236A1Publication Date: 2015-11-12
- Inventor: Krishnaswamy THIAGARAJAN , Jagdish Chand GOYAL , Srikanth MANIAN , Debapriya SAHU
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Main IPC: H03L7/197
- IPC: H03L7/197 ; H04L7/033 ; H04B1/40

Abstract:
A fractional-N frequency synthesizer that suppresses integer boundary spurs. A frequency synthesizer includes a fractional-N phase locked loop (PLL) and a reference frequency scaler. The reference frequency scaler is coupled to a reference clock input of the PLL, the reference frequency scaler includes a programmable frequency divider, and a programmable frequency multiplier connected in series with the programmable frequency divider. Each of the divider and multiplier is configured to scale a reference frequency provided to the PLL by a programmable integer value.
Public/Granted literature
- US09509323B2 Fractional-N synthesizer with pre-multiplication Public/Granted day:2016-11-29
Information query
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