Invention Application
- Patent Title: SEMICONDUCTOR WAFER TESTING SYSTEM AND RELATED METHOD FOR IMPROVING EXTERNAL MAGNETIC FIELD WAFER TESTING
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Application No.: US16411647Application Date: 2019-05-14
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Publication No.: US20200096559A1Publication Date: 2020-03-26
- Inventor: Harry-Hak-Lay Chuang , Chih-Yang Chang , Ching-Huang Wang , Tien-Wei Chiang , Meng-Chun Shih , Chia Yu Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G11C11/16 ; G11C29/56 ; G01R1/16

Abstract:
In some embodiments, a semiconductor wafer testing system is provided. The semiconductor wafer testing system includes a semiconductor wafer prober having one or more conductive probes, where the semiconductor wafer prober is configured to position the one or more conductive probes on an integrated chip (IC) that is disposed on a semiconductor wafer. The semiconductor wafer testing system also includes a ferromagnetic wafer chuck, where the ferromagnetic wafer chuck is configured to hold the semiconductor wafer while the wafer prober positions the one or more conductive probes on the IC. An upper magnet is disposed over the ferromagnetic wafer chuck, where the upper magnet is configured to generate an external magnetic field between the upper magnet and the ferromagnetic wafer chuck, and where the ferromagnetic wafer chuck amplifies the external magnetic field such that the external magnetic field passes through the IC with an amplified magnetic field strength.
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