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公开(公告)号：US11276649B2
公开(公告)日：2022-03-15
申请号：US16711152
申请日：2019-12-11
IPC分类号： H01L23/552 , H05K9/00 , H01L43/02
摘要： Devices and methods are provided in which a magnetic sensitive semiconductor chip, such as a magnetoresistive random-access memory (MRAM) chip, is shielded from magnetic interference by a magnetic shielding layer. A device includes a housing that defines an exterior surface. A semiconductor chip is disposed within the housing, and the semiconductor chip is spaced apart from the exterior surface of the housing. A magnetic shielding layer is spaced apart from the semiconductor chip by a distance less than 5 mm.
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2.发明申请公开(公告)号：US20200097255A1
公开(公告)日：2020-03-26
申请号：US16434345
申请日：2019-06-07
发明人： Harry-Hak-Lay Chuang , Chih-Yang Chang , Ching-Huang Wang , Chih-Hui Weng , Tien-Wei Chiang , Meng-Chun Shih , Chia Yu Wang , Chia-Hsiang Chen
摘要： In some embodiments, a method for generating a random bit is provided. The method includes generating a first random bit by providing a random number generator (RNG) signal to a magnetoresistive random-access memory (MRAM) cell. The RNG signal has a probability of about 0.5 to switch the resistive state of the MRAM cell from a first resistive state corresponding to a first data state to a second resistive state corresponding to a second data sate. The first random bit is then read from the MRAM cell.
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3.发明申请公开(公告)号：US20200096559A1
公开(公告)日：2020-03-26
申请号：US16411647
申请日：2019-05-14
发明人： Harry-Hak-Lay Chuang , Chih-Yang Chang , Ching-Huang Wang , Tien-Wei Chiang , Meng-Chun Shih , Chia Yu Wang
摘要： In some embodiments, a semiconductor wafer testing system is provided. The semiconductor wafer testing system includes a semiconductor wafer prober having one or more conductive probes, where the semiconductor wafer prober is configured to position the one or more conductive probes on an integrated chip (IC) that is disposed on a semiconductor wafer. The semiconductor wafer testing system also includes a ferromagnetic wafer chuck, where the ferromagnetic wafer chuck is configured to hold the semiconductor wafer while the wafer prober positions the one or more conductive probes on the IC. An upper magnet is disposed over the ferromagnetic wafer chuck, where the upper magnet is configured to generate an external magnetic field between the upper magnet and the ferromagnetic wafer chuck, and where the ferromagnetic wafer chuck amplifies the external magnetic field such that the external magnetic field passes through the IC with an amplified magnetic field strength.
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4.发明申请公开(公告)号：US20200028072A1
公开(公告)日：2020-01-23
申请号：US16587430
申请日：2019-09-30
摘要： Some embodiments relate to a magnetoresistive random-access memory (MRAM) cell. The cell includes a bottom electrode having a central bottom electrode portion surrounded by a peripheral bottom electrode portion. Step regions of the conductive bottom electrode couple the central and peripheral bottom electrode portions to one another such that an upper surface of the central portion is recessed relative to an upper surface of the peripheral portion. A magnetic tunneling junction (MTJ) has MTJ outer sidewalls which are disposed over the bottom central electrode portion and which are arranged between the step regions. A top electrode is disposed over an upper surface of the MTJ. Other devices and methods are also disclosed.
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5.发明申请公开(公告)号：US20200006245A1
公开(公告)日：2020-01-02
申请号：US16381410
申请日：2019-04-11
IPC分类号： H01L23/552 , H01L27/22 , H01L43/02 , H01L43/12 , H01L23/495 , H01L23/00
摘要： In some embodiments, the present application provides a memory device. The memory device includes a chip that includes a magnetic random access memory (MRAM) cell. A magnetic-field-shielding structure at least partially surrounding the chip including a multilayer stack. The multilayer stack includes a magnetic layer and a dielectric layer. A first magnetic region is located inside an inner surface of the magnetic field shielding structure and a second magnetic region is located immediately outside an outer surface of the magnetic field shielding structure. A magnetic field in the first magnetic region is less than a magnetic field in the second magnetic region
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公开(公告)号：US11506706B2
公开(公告)日：2022-11-22
申请号：US17126222
申请日：2020-12-18
发明人： Harry-Hak-Lay Chuang , Chih-Yang Chang , Ching-Huang Wang , Tien-Wei Chiang , Meng-Chun Shih , Chia Yu Wang
摘要： In some embodiments, a semiconductor wafer testing system is provided. The semiconductor wafer testing system includes a semiconductor wafer prober having one or more conductive probes, where the semiconductor wafer prober is configured to position the one or more conductive probes on an integrated chip (IC) that is disposed on a semiconductor wafer. The semiconductor wafer testing system also includes a ferromagnetic wafer chuck, where the ferromagnetic wafer chuck is configured to hold the semiconductor wafer while the wafer prober positions the one or more conductive probes on the IC. An upper magnet is disposed over the ferromagnetic wafer chuck, where the upper magnet is configured to generate an external magnetic field between the upper magnet and the ferromagnetic wafer chuck, and where the ferromagnetic wafer chuck amplifies the external magnetic field such that the external magnetic field passes through the IC with an amplified magnetic field strength.
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7.发明授权公开(公告)号：US11088083B2
公开(公告)日：2021-08-10
申请号：US16381410
申请日：2019-04-11
IPC分类号： H01L27/22 , H01L23/552 , H01L43/02 , H01L43/12 , H01L23/495 , H01L23/00
摘要： In some embodiments, the present application provides a memory device. The memory device includes a chip that includes a magnetic random access memory (MRAM) cell. A magnetic-field-shielding structure at least partially surrounding the chip including a multilayer stack. The multilayer stack includes a magnetic layer and a dielectric layer. A first magnetic region is located inside an inner surface of the magnetic field shielding structure and a second magnetic region is located immediately outside an outer surface of the magnetic field shielding structure. A magnetic field in the first magnetic region is less than a magnetic field in the second magnetic region.
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公开(公告)号：US10937957B2
公开(公告)日：2021-03-02
申请号：US16587430
申请日：2019-09-30
摘要： Some embodiments relate to a magnetoresistive random-access memory (MRAM) cell. The cell includes a bottom electrode having a central bottom electrode portion surrounded by a peripheral bottom electrode portion. Step regions of the conductive bottom electrode couple the central and peripheral bottom electrode portions to one another such that an upper surface of the central portion is recessed relative to an upper surface of the peripheral portion. A magnetic tunneling junction (MTJ) has MTJ outer sidewalls which are disposed over the bottom central electrode portion and which are arranged between the step regions. A top electrode is disposed over an upper surface of the MTJ. Other devices and methods are also disclosed.
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公开(公告)号：US20200098440A1
公开(公告)日：2020-03-26
申请号：US16410308
申请日：2019-05-13
发明人： Harry-Hak-Lay Chuang , Tien-Wei Chiang , Wen-Chun You , Yi-Chieh Chiu , Yu-Lin Chen , Jian-Cheng Huang , Chang-Hung Chen
摘要： Various embodiments of the present application are directed towards a one-time-programmable (OTP) implementation using magnetic junctions. In some embodiments, an array comprises multiple magnetic junctions in multiple columns and multiple rows, and the magnetic junctions comprise a first magnetic junction and a second magnetic junction. The first and second magnetic junctions comprise individual top ferromagnetic elements and individual bottom ferromagnetic elements, and further comprise individual barrier elements between the top and bottom ferromagnetic elements. A first barrier element of the first magnetic junction electrically separates first top and bottom ferromagnetic elements of the first magnetic junction. A second barrier element of the second magnetic junction has undergone breakdown, such that it has defects defining a leakage path between second top and bottom ferromagnetic elements of the second magnetic junction. The broken-down state corresponds to a one-time programmed state and is not susceptible to high-temperature change, even at small sizes.
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10.发明申请公开(公告)号：US20190386061A1
公开(公告)日：2019-12-19
申请号：US16379901
申请日：2019-04-10
发明人： Kuo-An Liu , Chung-Cheng Wu , Harry-Hak-Lay Chuang , Gwan-Sin Chang , Tien-Wei Chiang , Zhiqiang Wu , Chia-Hsiang Chen
摘要： In some embodiments, the present application provides a memory device. The memory device includes a chip that includes a magnetic random access memory (MRAM) cell. A magnetic-field-shielding structure comprised of conductive or magnetic material at least partially surrounds the chip. The magnetic-field-shielding structure comprises a sidewall region that laterally surrounds the chip, an upper region extending upward from the sidewall region, and a lower region extending downward from the sidewall region. At least one of the upper region and/or lower region terminate at an opening over the chip.
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