- 专利标题: SELECTIVE GATE SPACERS FOR SEMICONDUCTOR DEVICES
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申请号: US17154755申请日: 2021-01-21
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公开(公告)号: US20210143265A1公开(公告)日: 2021-05-13
- 发明人: Scott B. Clendenning , Szuya S. Liao , Florian Gstrein , Rami Hourani , Patricio E. Romero , Grant M. Kloster , Martin M. Mitan
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 主分类号: H01L29/66
- IPC分类号: H01L29/66 ; H01L29/06 ; H01L21/265 ; H01L29/423 ; H01L29/51 ; H01L29/775 ; H01L21/28 ; H01L29/49
摘要:
Techniques related to forming selective gate spacers for semiconductor devices and transistor structures and devices formed using such techniques are discussed. Such techniques include forming a blocking material on a semiconductor fin, disposing a gate having a different surface chemistry than the blocking material on a portion of the blocking material, forming a selective conformal layer on the gate but not on a portion of the blocking material, and removing exposed portions of the blocking material.
公开/授权文献
- US11532724B2 Selective gate spacers for semiconductor devices 公开/授权日:2022-12-20
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