Invention Application
- Patent Title: On-Die Aging Measurements for Dynamic Timing Modeling
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Application No.: US18086616Application Date: 2022-12-21
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Publication No.: US20230129176A1Publication Date: 2023-04-27
- Inventor: Dheeraj Subbareddy , Ankireddy Nalamalpu , Mahesh A. Iyer , Dhananjay Raghavan
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G01R31/26
- IPC: G01R31/26 ; G01R31/317 ; G01R31/3193 ; G01R31/28 ; G01R31/30 ; G01R31/3185

Abstract:
A method includes mapping an aging measurement circuit (AMC) into the core fabric of an FPGA and operating the AMC for a select time period. During the select period of time, the AMC counts transition of a signal propagating through the AMC. Timing information based on the counted transitions is stored in a timing model in a memory. The timing information represents an aging characteristic of the core fabric at a time that the AMC is operated. An EDA toolchain uses the timing information in the timing model to generate a timing guard-band for the configurable IC die. The AMC is removed from the core fabric and another circuit device is mapped and fitted into the core fabric using the generated timing guard-band models. The circuit device is operated in the configurable IC die based on the timing guard-band models.
Public/Granted literature
- US12216150B2 On-die aging measurements for dynamic timing modeling Public/Granted day:2025-02-04
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