Invention Application
- Patent Title: GATE LINE PLUG STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION
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Application No.: US18088461Application Date: 2022-12-23
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Publication No.: US20230131757A1Publication Date: 2023-04-27
- Inventor: Byron HO , Michael L. HATTENDORF , Christopher P. AUTH
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L27/088 ; H01L21/762 ; H01L29/06 ; H01L21/8234 ; H01L21/768 ; H01L23/522 ; H01L23/532 ; H01L29/165 ; H01L29/417 ; H01L21/033 ; H01L21/28 ; H01L21/285 ; H01L21/308 ; H01L21/311 ; H01L21/8238 ; H01L23/528 ; H01L27/092 ; H10B10/00 ; H01L29/08 ; H01L29/51 ; H01L27/02 ; H01L21/02 ; H01L29/167

Abstract:
Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a first silicon fin having a longest dimension along a first direction. A second silicon fin having a longest dimension is along the first direction. An insulator material is between the first silicon fin and the second silicon fin. A gate line is over the first silicon fin and over the second silicon fin along a second direction, the second direction orthogonal to the first direction, the gate line having a first side and a second side, wherein the gate line has a discontinuity over the insulator material, the discontinuity filled by a dielectric plug.
Information query
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