Invention Publication
- Patent Title: INTEGRATED CIRCUIT PACKAGE ARCHITECTURES WITH CORE AND/OR BUILD-UP LAYERS COMPRISING SPIN-ON GLASS (SOG)
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Application No.: US18061181Application Date: 2022-12-02
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Publication No.: US20240186227A1Publication Date: 2024-06-06
- Inventor: Haobo Chen , Bohan Shan , Kyle J. Arrington , Kristof Darmawikarta , Gang Duan , Jeremy D. Ecton , Hongxia Feng , Xiaoying Guo , Ziyin Lin , Brandon Christian Marin , Srinivas V. Pietambaram , Dingying Xu
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/48 ; H01L23/00 ; H01L23/538 ; H01L23/64 ; H01L25/065 ; H05K1/02 ; H05K1/03 ; H05K1/11 ; H05K1/18 ; H05K3/46

Abstract:
In one embodiment, an integrated circuit package substrate includes a core layer comprising a plurality of metal vias electrically coupling a first side of the core layer and a second side of the core layer opposite the first side. The package substrate further includes a build-up layer on the first side of the core layer, the build-up layer comprising metal vias within a dielectric material and electrically connected to the metal vias of the core layer. The dielectric material includes Silicon, Oxygen, and at least one of Boron or Phosphorus.
Information query
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