公开(公告)号：US20240186228A1

公开(公告)日：2024-06-06

申请号：US18061237

申请日：2022-12-02

申请人： Intel Corporation

发明人： Haobo Chen ,  Bohan Shan ,  Kyle J. Arrington ,  Yiqun Bai ,  Kristof Darmawikarta ,  Gang Duan ,  Jeremy D. Ecton ,  Hongxia Feng ,  Xiaoying Guo ,  Ziyin Lin ,  Brandon Christian Marin ,  Bai Nie ,  Srinivas V. Pietambaram ,  Dingying Xu

IPC分类号： H01L23/498 ,  H01L21/48

CPC分类号： H01L23/49822 ,  H01L21/486 ,  H01L23/49827

摘要： In one embodiment, an integrated circuit package substrate includes a core layer comprising a dielectric material and a plurality of metal vias within the core layer. The dielectric material includes Silicon, Oxygen, and at least one of Boron or Phosphorus. The metal vias electrically couple a first side of the core layer and a second side of the core layer opposite the first side. The package substrate further includes a plurality of build-up layers on the core layer, the build-up layers comprising metal vias electrically connected to the metal vias of the core layer.

公开(公告)号：US20210134698A1

公开(公告)日：2021-05-06

申请号：US16672858

申请日：2019-11-04

申请人： Intel Corporation

发明人： Kyle J. Arrington ,  Aaron McCann ,  Kelly Lofgreen ,  Elah Bozorg-Grayeli ,  Aravindha Antoniswamy ,  Joseph B. Petrini

IPC分类号： H01L23/373 ,  H01L23/00 ,  H01L25/00

摘要： A thermal interface structure may be formed comprising a thermally conductive substrate having a first surface and an opposing second surface, a first liquid metal layer on the first surface of the thermally conductive substrate, and a second liquid metal layer on the second surface of the thermally conductive substrate. The thermal interface structure may be used in an integrated circuit assembly or package between at least one integrated circuit device and a heat dissipation device.

公开(公告)号：US20240186227A1

公开(公告)日：2024-06-06

申请号：US18061181

申请日：2022-12-02

申请人： Intel Corporation

发明人： Haobo Chen ,  Bohan Shan ,  Kyle J. Arrington ,  Kristof Darmawikarta ,  Gang Duan ,  Jeremy D. Ecton ,  Hongxia Feng ,  Xiaoying Guo ,  Ziyin Lin ,  Brandon Christian Marin ,  Srinivas V. Pietambaram ,  Dingying Xu

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L23/538 ,  H01L23/64 ,  H01L25/065 ,  H05K1/02 ,  H05K1/03 ,  H05K1/11 ,  H05K1/18 ,  H05K3/46

CPC分类号： H01L23/49822 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5381 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/642 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0655 ,  H05K1/0271 ,  H05K1/0306 ,  H05K1/113 ,  H05K1/181 ,  H05K3/4605 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15174 ,  H01L2924/157 ,  H01L2924/15788 ,  H05K2201/0195

摘要： In one embodiment, an integrated circuit package substrate includes a core layer comprising a plurality of metal vias electrically coupling a first side of the core layer and a second side of the core layer opposite the first side. The package substrate further includes a build-up layer on the first side of the core layer, the build-up layer comprising metal vias within a dielectric material and electrically connected to the metal vias of the core layer. The dielectric material includes Silicon, Oxygen, and at least one of Boron or Phosphorus.

公开(公告)号：US20210125896A1

公开(公告)日：2021-04-29

申请号：US16662562

申请日：2019-10-24

申请人： Intel Corporation

发明人： Kyle J. Arrington ,  Aaron Mccann ,  Kelly Lofgreen ,  Aravindha R. Antoniswamy ,  Shankar Devasenathipathy

IPC分类号： H01L23/373 ,  H01L23/532 ,  H01L21/48

摘要： A thermal interface material may be formed comprising a liquid metal and a corrosion resistant filler material. The thermal interface material may be used in an integrated circuit assembly between at least one integrated circuit device and a heat dissipation device, wherein the corrosion resistant filler material changes the physical properties of the thermal interface material, which may prevent failure modes from occurring during the operation of the integrated circuit assembly and may assist in maintaining a bond line thickness between the at least one integrated circuit device and the heat dissipation device.

公开(公告)号：US11869824B2

公开(公告)日：2024-01-09

申请号：US16672858

申请日：2019-11-04

申请人： Intel Corporation

发明人： Kyle J. Arrington ,  Aaron McCann ,  Kelly Lofgreen ,  Elah Bozorg-Grayeli ,  Aravindha Antoniswamy ,  Joseph B. Petrini

IPC分类号： H01L23/373 ,  H01L23/00 ,  H01L25/00

CPC分类号： H01L23/3735 ,  H01L23/3733 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/00 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32506 ,  H01L2224/73253

摘要： A thermal interface structure may be formed comprising a thermally conductive substrate having a first surface and an opposing second surface, a first liquid metal layer on the first surface of the thermally conductive substrate, and a second liquid metal layer on the second surface of the thermally conductive substrate. The thermal interface structure may be used in an integrated circuit assembly or package between at least one integrated circuit device and a heat dissipation device.

公开(公告)号：US20240006400A1

公开(公告)日：2024-01-04

申请号：US17856965

申请日：2022-07-02

申请人： Intel Corporation

发明人： Kyle J. Arrington ,  Karumbu Nathan Meyyappan ,  Srikant Nekkanty

IPC分类号： H01L25/18 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538

CPC分类号： H01L25/18 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L23/49811 ,  H01L23/5385 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13105 ,  H01L2224/13139 ,  H01L2224/13169 ,  H01L2224/13144 ,  H01L2224/13166 ,  H01L2224/13184 ,  H01L2224/81405 ,  H01L2224/81409 ,  H01L2224/81411 ,  H01L2224/81418 ,  H01L2924/01008 ,  H01L2224/2919 ,  H01L2924/0665 ,  H01L24/29

摘要： In one embodiment, an integrated circuit assembly includes a substrate comprising electrical connectors on a top side of the substrate and an integrated circuit die coupled to the top side of the substrate. The integrated circuit die includes metal pillars extending from a bottom side of the die facing the top side of the substrate, and the metal pillars of the integrated circuit die are electrically connected to the electrical connectors of the substrate via a liquid metal (e.g., a Gallium-based alloy).