Invention Grant
- Patent Title: Substrate having a charged zone in an insulating buried layer
- Patent Title (中): 衬底在绝缘掩埋层中具有带电区域
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Application No.: US14027528Application Date: 2013-09-16
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Publication No.: US08735946B2Publication Date: 2014-05-27
- Inventor: Mohamad A Shaheen , Frederic Allibert , Gweltaz Gaudin , Fabrice Lallement , Didier Landru , Karine Landry , Carlos Mazure
- Applicant: Soitec
- Applicant Address: FR Bernin
- Assignee: Soitec
- Current Assignee: Soitec
- Current Assignee Address: FR Bernin
- Agency: TraskBritt
- Main IPC: H01L27/148
- IPC: H01L27/148
Abstract:
Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 1010 charges/cm2. The invention also relates to processes for making such substrates.
Public/Granted literature
- US20140015023A1 SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER Public/Granted day:2014-01-16
Information query
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