Invention Grant
- Patent Title: Method for manufacturing insulated-gate MOS transistors
- Patent Title (中): 绝缘栅MOS晶体管的制造方法
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Application No.: US13659771Application Date: 2012-10-24
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Publication No.: US08878331B2Publication Date: 2014-11-04
- Inventor: Mickael Gros-Jean , Clement Gaumer , Emmanuel Bayard Perrin
- Applicant: STMicroelectronics (Crolles 2) SAS
- Applicant Address: FR Crolles
- Assignee: STMicroelectronics (Crolles 2) SAS
- Current Assignee: STMicroelectronics (Crolles 2) SAS
- Current Assignee Address: FR Crolles
- Agency: Seed IP Law Group PLLC
- Priority: FR1159660 20111025
- Main IPC: H01L29/02
- IPC: H01L29/02 ; H01L21/70 ; H01L21/28 ; H01L29/51 ; H01L21/762 ; H01L21/8234
Abstract:
A method for defining an insulator in a semiconductor substrate includes forming a trench in the substrate, forming in the trench an insulating material having its upper surface arranged above the surface of the substrate, and forming a diffusion barrier layer in a portion of the insulating material located above the surface of the semiconductor substrate. Such insulators can be used, for example, to insulate and delineate electronic components or portions of components formed in the substrate.
Public/Granted literature
- US20130099329A1 METHOD FOR MANUFACTURING INSULATED-GATE MOS TRANSISTORS Public/Granted day:2013-04-25
Information query
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