发明授权
- 专利标题: Semiconductor package with through silicon vias
- 专利标题(中): 半导体封装通过硅通孔
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申请号: US12897124申请日: 2010-10-04
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公开(公告)号: US08946742B2公开(公告)日: 2015-02-03
- 发明人: Chen-Hua Yu , Hung-Pin Chang , Yung-Chi Lin , Chia-Lin Yu , Jui-Pin Hung , Chien Ling Hwang
- 申请人: Chen-Hua Yu , Hung-Pin Chang , Yung-Chi Lin , Chia-Lin Yu , Jui-Pin Hung , Chien Ling Hwang
- 申请人地址: TW Hsinchu
- 专利权人: TSMC Solid State Lighting Ltd.
- 当前专利权人: TSMC Solid State Lighting Ltd.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Haynes and Boone, LLP
- 主分类号: H01L33/00
- IPC分类号: H01L33/00 ; H01L21/768 ; H01L21/683 ; H01L23/48 ; H01L33/48 ; H01L33/64 ; H01L21/48 ; H01L23/14 ; H01L23/498 ; H01L23/00 ; H01L33/62
摘要:
The substrate with through silicon plugs (or vias) described above removes the need for conductive bumps. The process flow is very simple and cost efficient. The structures described combines the separate TSV, redistribution layer, and conductive bump structures into a single structure. By combining the separate structures, a low resistance electrical connection with high heat dissipation capability is created. In addition, the substrate with through silicon plugs (or vias, or trenches) also allows multiple chips to be packaged together. A through silicon trench can surround the one or more chips to provide protection against copper diffusing to neighboring devices during manufacturing. In addition, multiple chips with similar or different functions can be integrated on the TSV substrate. Through silicon plugs with different patterns can be used under a semiconductor chip(s) to improve heat dissipation and to resolve manufacturing concerns.
公开/授权文献
- US20110241040A1 NOVEL SEMICONDUCTOR PACKAGE WITH THROUGH SILICON VIAS 公开/授权日:2011-10-06
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