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公开(公告)号:US08946742B2
公开(公告)日:2015-02-03
申请号:US12897124
申请日:2010-10-04
申请人: Chen-Hua Yu , Hung-Pin Chang , Yung-Chi Lin , Chia-Lin Yu , Jui-Pin Hung , Chien Ling Hwang
发明人: Chen-Hua Yu , Hung-Pin Chang , Yung-Chi Lin , Chia-Lin Yu , Jui-Pin Hung , Chien Ling Hwang
IPC分类号: H01L33/00 , H01L21/768 , H01L21/683 , H01L23/48 , H01L33/48 , H01L33/64 , H01L21/48 , H01L23/14 , H01L23/498 , H01L23/00 , H01L33/62
CPC分类号: H01L21/76898 , H01L21/3065 , H01L21/486 , H01L21/6835 , H01L21/76843 , H01L21/76876 , H01L21/76877 , H01L21/76879 , H01L23/147 , H01L23/481 , H01L23/49827 , H01L24/29 , H01L24/48 , H01L24/49 , H01L24/97 , H01L33/005 , H01L33/0054 , H01L33/486 , H01L33/62 , H01L33/641 , H01L33/644 , H01L33/647 , H01L2221/68345 , H01L2221/68359 , H01L2224/16 , H01L2224/32225 , H01L2224/32506 , H01L2224/48091 , H01L2224/48227 , H01L2224/48233 , H01L2224/49113 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01019 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/04941 , H01L2924/12041 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2933/0066 , H01L2924/3512 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: The substrate with through silicon plugs (or vias) described above removes the need for conductive bumps. The process flow is very simple and cost efficient. The structures described combines the separate TSV, redistribution layer, and conductive bump structures into a single structure. By combining the separate structures, a low resistance electrical connection with high heat dissipation capability is created. In addition, the substrate with through silicon plugs (or vias, or trenches) also allows multiple chips to be packaged together. A through silicon trench can surround the one or more chips to provide protection against copper diffusing to neighboring devices during manufacturing. In addition, multiple chips with similar or different functions can be integrated on the TSV substrate. Through silicon plugs with different patterns can be used under a semiconductor chip(s) to improve heat dissipation and to resolve manufacturing concerns.
摘要翻译: 具有上述通孔硅衬底(或通孔)的基板消除了对导电凸块的需要。 流程非常简单,成本效益高。 所描述的结构将单独的TSV,再分配层和导电凸块结构组合成单个结构。 通过组合单独的结构,产生具有高散热能力的低电阻电连接。 此外,具有通过硅插头(或通孔或沟槽)的基板还允许将多个芯片封装在一起。 通过硅沟槽可围绕一个或多个芯片,以在制造期间提供防止铜扩散到相邻器件的保护。 此外,具有相似或不同功能的多个芯片可以集成在TSV基板上。 通过具有不同图案的硅插头可以在半导体芯片下使用以改善散热并解决制造问题。
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公开(公告)号:US08507940B2
公开(公告)日:2013-08-13
申请号:US12879584
申请日:2010-09-10
申请人: Chen-Hua Yu , Hung-Pin Chang , Yung-Chi Lin , Chia-Lin Yu , Jui-Pin Hung , Chien Ling Hwang
发明人: Chen-Hua Yu , Hung-Pin Chang , Yung-Chi Lin , Chia-Lin Yu , Jui-Pin Hung , Chien Ling Hwang
IPC分类号: H01L33/00
CPC分类号: H01L21/76898 , H01L21/3065 , H01L21/486 , H01L21/6835 , H01L21/76843 , H01L21/76876 , H01L21/76877 , H01L21/76879 , H01L23/147 , H01L23/481 , H01L23/49827 , H01L24/29 , H01L24/48 , H01L24/49 , H01L24/97 , H01L33/005 , H01L33/0054 , H01L33/486 , H01L33/62 , H01L33/641 , H01L33/644 , H01L33/647 , H01L2221/68345 , H01L2221/68359 , H01L2224/16 , H01L2224/32225 , H01L2224/32506 , H01L2224/48091 , H01L2224/48227 , H01L2224/48233 , H01L2224/49113 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01019 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/04941 , H01L2924/12041 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2933/0066 , H01L2924/3512 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: The package substrates with through silicon plugs (or vias) described above provide lateral and vertical heat dissipation pathways for semiconductor chips that require thermal management. Designs of through silicon plugs (TSPs) with high duty ratios can most effectively provide heat dissipation. TSP designs with patterns of double-sided combs can provide high duty ratios, such as equal to or greater than 50%. Package substrates with high duty ratios are useful for semiconductor chips that generate large amount of heat. An example of such semiconductor chip is a light-emitting diode (LED) chip.
摘要翻译: 具有上述通孔硅封装(或通孔)的封装衬底为需要热管理的半导体芯片提供侧向和垂直散热路径。 具有高占空比的通过硅插头(TSP)的设计可以最有效地提供散热。 具有双面梳状图案的TSP设计可以提供等于或大于50%的高占空比。 具有高占空比的封装衬底对于产生大量热量的半导体芯片是有用的。 这种半导体芯片的例子是发光二极管(LED)芯片。
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公开(公告)号:US20120068218A1
公开(公告)日:2012-03-22
申请号:US12884570
申请日:2010-09-17
申请人: Hung-Pin Chang , Yung-Chi Lin , Chia-Lin Yu , Jui-Ping Hung , Chien Ling Hwang , Chen-Hua Yu
发明人: Hung-Pin Chang , Yung-Chi Lin , Chia-Lin Yu , Jui-Ping Hung , Chien Ling Hwang , Chen-Hua Yu
CPC分类号: H01L33/642 , H01L33/486 , H01L33/647 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2933/0033 , H01L2933/0075 , H01L2924/00014 , H01L2924/00
摘要: The present disclosure provides a method of packaging for a photonic device, such as a light-emitting diode device. The packaging includes an insulating structure. The packaging includes first and second conductive structures that each extend through the insulating structure. A substantial area of a bottom surface of the light-emitting diode device is in direct contact with a top surface of the first conductive structure. A top surface of the light-emitting diode device is bonded to the second conductive structure through a bonding wire.
摘要翻译: 本公开提供了一种用于光子器件(例如发光二极管器件)的封装方法。 包装包括绝缘结构。 该包装包括各自延伸穿过绝缘结构的第一和第二导电结构。 发光二极管器件的底面的实质区域与第一导电结构的顶表面直接接触。 发光二极管器件的顶表面通过接合线接合到第二导电结构。
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4.
公开(公告)号:US08377796B2
公开(公告)日:2013-02-19
申请号:US12539374
申请日:2009-08-11
申请人: Chia-Lin Yu , Chen-Hua Yu , Ding-Yuan Chen , Wen-Chih Chiou
发明人: Chia-Lin Yu , Chen-Hua Yu , Ding-Yuan Chen , Wen-Chih Chiou
IPC分类号: H01L21/768
CPC分类号: H01L21/02365 , H01L21/02104 , H01L21/0237 , H01L21/02381 , H01L21/02458 , H01L21/02491 , H01L21/02502 , H01L21/02538 , H01L21/02639 , H01L21/02642 , H01L21/02645 , H01L29/12
摘要: A method of forming a circuit structure includes providing a substrate; forming recesses in the substrate; forming a mask layer over the substrate, wherein the mask layer covers non-recessed portions of the substrate, with the recesses exposed through openings in the mask layer; forming a buffer/nucleation layer on exposed portions of the substrate in the recesses; and growing a group-III group-V (III-V) compound semiconductor material from the recesses until portions of the III-V compound semiconductor material grown from the recesses join each other to form a continuous III-V compound semiconductor layer.
摘要翻译: 形成电路结构的方法包括提供基板; 在基板上形成凹部; 在所述基板上形成掩模层,其中所述掩模层覆盖所述基板的非凹部,所述凹部通过所述掩模层中的开口暴露; 在所述凹部中的所述基板的暴露部分上形成缓冲/成核层; 以及从所述凹部生长第III族V族化合物半导体材料,直到从所述凹部生长的所述III-V族化合物半导体材料的部分相互连接形成连续的III-V族化合物半导体层。
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公开(公告)号:US08148732B2
公开(公告)日:2012-04-03
申请号:US12509339
申请日:2009-07-24
申请人: Chen-Hua Yu , Chia-Lin Yu , Ding-Yuan Chen , Wen-Chih Chiou , Hung-Ta Lin
发明人: Chen-Hua Yu , Chia-Lin Yu , Ding-Yuan Chen , Wen-Chih Chiou , Hung-Ta Lin
IPC分类号: H01L33/00
CPC分类号: H01L33/007 , H01L21/02381 , H01L21/02447 , H01L21/02458 , H01L21/02491 , H01L21/02505 , H01L21/0254 , H01L21/223 , H01L21/26506 , H01L33/025
摘要: A light-emitting diode (LED) device is provided. The LED device is formed on a substrate having a carbon-containing layer. Carbon atoms are introduced into the substrate to prevent or reduce atoms from an overlying metal/metal alloy transition layer from inter-mixing with atoms of the substrate. In this manner, a crystalline structure is maintained upon which the LED structure may be formed.
摘要翻译: 提供了一种发光二极管(LED)装置。 LED装置形成在具有含碳层的基板上。 将碳原子引入衬底中以防止或减少来自上层金属/金属合金过渡层的原子与衬底的原子的混合。 以这种方式,保持可以形成LED结构的晶体结构。
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公开(公告)号:US08134163B2
公开(公告)日:2012-03-13
申请号:US12247895
申请日:2008-10-08
申请人: Chen-Hua Yu , Hung-Ta Lin , Wen-Chih Chiou , Ding-Yuan Chen , Chia-Lin Yu
发明人: Chen-Hua Yu , Hung-Ta Lin , Wen-Chih Chiou , Ding-Yuan Chen , Chia-Lin Yu
IPC分类号: H01L33/08
摘要: A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency.
摘要翻译: 提供了一种形成在凹面纹理基板上的发光二极管(LED)的半导体器件。 对衬底进行图案化和蚀刻以形成凹陷。 沿着凹部的底部形成分离层。 沿着侧壁和任选地沿着相邻凹部之间的基板的表面形成LED结构。 在这些实施例中,与平面表面相比,LED结构的表面积增加。 在另一个实施例中,LED结构形成在凹部内,使得底部接触层与凹部的拓扑不一致。 在这些实施例中,硅衬底中的凹陷导致底接触层中的立方结构,例如具有非极性特性并且表现出更高外部量子效率的n-GaN层。
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7.
公开(公告)号:US20100068866A1
公开(公告)日:2010-03-18
申请号:US12539374
申请日:2009-08-11
申请人: Chia-Lin Yu , Chen-Hua Yu , Ding-Yuan Chen , Wen-Chih Chiou
发明人: Chia-Lin Yu , Chen-Hua Yu , Ding-Yuan Chen , Wen-Chih Chiou
IPC分类号: H01L21/768
CPC分类号: H01L21/02365 , H01L21/02104 , H01L21/0237 , H01L21/02381 , H01L21/02458 , H01L21/02491 , H01L21/02502 , H01L21/02538 , H01L21/02639 , H01L21/02642 , H01L21/02645 , H01L29/12
摘要: A method of forming a circuit structure includes providing a substrate; forming recesses in the substrate; forming a mask layer over the substrate, wherein the mask layer covers non-recessed portions of the substrate, with the recesses exposed through openings in the mask layer; forming a buffer/nucleation layer on exposed portions of the substrate in the recesses; and growing a group-III group-V (III-V) compound semiconductor material from the recesses until portions of the III-V compound semiconductor material grown from the recesses join each other to form a continuous III-V compound semiconductor layer.
摘要翻译: 形成电路结构的方法包括提供基板; 在基板上形成凹部; 在所述基板上形成掩模层,其中所述掩模层覆盖所述基板的非凹部,所述凹部通过所述掩模层中的开口暴露; 在所述凹部中的所述基板的暴露部分上形成缓冲/成核层; 以及从所述凹部生长第III族V族化合物半导体材料,直到从所述凹部生长的所述III-V族化合物半导体材料的部分相互连接形成连续的III-V族化合物半导体层。
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8.
公开(公告)号:US08803189B2
公开(公告)日:2014-08-12
申请号:US12538701
申请日:2009-08-10
申请人: Chen-Hua Yu , Chia-Lin Yu , Ding-Yuan Chen , Wen-Chih Chiou , Hung-Ta Lin
发明人: Chen-Hua Yu , Chia-Lin Yu , Ding-Yuan Chen , Wen-Chih Chiou , Hung-Ta Lin
IPC分类号: H01L33/00
CPC分类号: H01L21/8258 , H01L21/0237 , H01L21/02458 , H01L21/02491 , H01L21/02502 , H01L21/0254 , H01L21/02642 , H01L21/02645 , H01L29/2003 , H01L29/66462 , H01L33/007
摘要: A circuit structure includes a substrate; a patterned mask layer over the substrate, wherein the patterned mask layer includes a plurality of gaps; and a group-III group-V (III-V) compound semiconductor layer. The III-V compound semiconductor layer includes a first portion over the mask layer and second portions in the gaps, wherein the III-V compound semiconductor layer overlies a buffer/nucleation layer.
摘要翻译: 电路结构包括基板; 在所述衬底上的图案化掩模层,其中所述图案化掩模层包括多个间隙; 和III族V族(III-V)族化合物半导体层。 III-V族化合物半导体层包括掩模层上的第一部分和间隙中的第二部分,其中III-V族化合物半导体层覆盖缓冲层/成核层。
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9.
公开(公告)号:US20100044719A1
公开(公告)日:2010-02-25
申请号:US12538701
申请日:2009-08-10
申请人: Chen-Hua Yu , Chia-Lin Yu , Ding-Yuan Chen , Wen-Chih Chiou , Hung-Ta Lin
发明人: Chen-Hua Yu , Chia-Lin Yu , Ding-Yuan Chen , Wen-Chih Chiou , Hung-Ta Lin
IPC分类号: H01L29/20
CPC分类号: H01L21/8258 , H01L21/0237 , H01L21/02458 , H01L21/02491 , H01L21/02502 , H01L21/0254 , H01L21/02642 , H01L21/02645 , H01L29/2003 , H01L29/66462 , H01L33/007
摘要: A circuit structure includes a substrate; a patterned mask layer over the substrate, wherein the patterned mask layer includes a plurality of gaps; and a group-III group-V (III-V) compound semiconductor layer. The III-V compound semiconductor layer includes a first portion over the mask layer and second portions in the gaps, wherein the III-V compound semiconductor layer overlies a buffer/nucleation layer.
摘要翻译: 电路结构包括基板; 在所述衬底上的图案化掩模层,其中所述图案化掩模层包括多个间隙; 和III族V族(III-V)族化合物半导体层。 III-V族化合物半导体层包括掩模层上的第一部分和间隙中的第二部分,其中III-V族化合物半导体层覆盖缓冲层/成核层。
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公开(公告)号:US20100038655A1
公开(公告)日:2010-02-18
申请号:US12270309
申请日:2008-11-13
申请人: Ding-Yuan Chen , Chia-Lin Yu , Chen-Hua Yu , Wen-Chih Chiou
发明人: Ding-Yuan Chen , Chia-Lin Yu , Chen-Hua Yu , Wen-Chih Chiou
IPC分类号: H01L33/00
CPC分类号: H01L33/62 , H01L27/15 , H01L27/156 , H01L33/06 , H01L33/08 , H01L33/30 , H01L33/32 , H01L33/42 , H01L33/60
摘要: A system and method for manufacturing a light-generating device is described. A preferred embodiment comprises a plurality of LEDs formed on a substrate. Each LED preferably has spacers along the sidewalls of the LED, and a reflective surface is formed on the substrate between the LEDs. The reflective surface is preferably located lower than the active layer of the individual LEDs.
摘要翻译: 描述了用于制造发光装置的系统和方法。 优选实施例包括形成在基板上的多个LED。 每个LED优选地具有沿LED的侧壁的间隔物,并且在LED之间的基板上形成反射表面。 反射表面优选地位于比各个LED的有源层更低的位置。
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