发明授权
US09100013B2 Nonvolatile resistor network assembly and nonvolatile logic gate with increased fault tolerance using the same
有权
非易失电阻网络组件和非易失性逻辑门,具有增加的容错能力
- 专利标题: Nonvolatile resistor network assembly and nonvolatile logic gate with increased fault tolerance using the same
- 专利标题(中): 非易失电阻网络组件和非易失性逻辑门,具有增加的容错能力
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申请号: US14344446申请日: 2012-09-06
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公开(公告)号: US09100013B2公开(公告)日: 2015-08-04
- 发明人: Ryusuke Nebashi , Noboru Sakimura , Yukihide Tsuji , Tadahiko Sugibayashi
- 申请人: Ryusuke Nebashi , Noboru Sakimura , Yukihide Tsuji , Tadahiko Sugibayashi
- 申请人地址: JP Tokyo
- 专利权人: NEC CORPORATION
- 当前专利权人: NEC CORPORATION
- 当前专利权人地址: JP Tokyo
- 代理机构: Sughrue Mion, PLLC
- 优先权: JP2011-210552 20110927
- 国际申请: PCT/JP2012/073389 WO 20120906
- 国际公布: WO2013/047213 WO 20130404
- 主分类号: H03K19/00
- IPC分类号: H03K19/00 ; H03K19/173 ; H03K19/177 ; H03K19/18 ; G11C11/16 ; G11C19/08
摘要:
Provided is a nonvolatile resistor network assembly characterized by that: it comprises a first and a second resistor network which are each composed of a plurality of nonvolatile resistive elements connected together; it also comprises a write means for writing into the first and second resistor networks; and writing into the first and second resistor networks is performed by the use of the write means in a manner to make total resistances of respectively the first and second resistor networks different from each other. Further provided is a nonvolatile logic gate which performs logical operation using stored data determined by the total resistances of the respective nonvolatile resistor networks.
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