Invention Grant
- Patent Title: Die seal ring for integrated circuit system with stacked device wafers
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Application No.: US14825703Application Date: 2015-08-13
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Publication No.: US09305968B2Publication Date: 2016-04-05
- Inventor: Yin Qian , Hsin-Chih Tai , Tiejun Dai , Duli Mao , Cunyu Yang , Howard E. Rhodes
- Applicant: OMNIVISION TECHNOLOGIES, INC.
- Applicant Address: US CA Santa Clara
- Assignee: OmniVision Technologies, Inc.
- Current Assignee: OmniVision Technologies, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely Sokoloff Taylor & Zafman LLP
- Main IPC: H01L27/146
- IPC: H01L27/146 ; H01L23/58 ; H01L23/00

Abstract:
An integrated circuit system includes a first device wafer bonded to a second device wafer at a bonding interface of dielectrics. Each wafer includes a plurality of dies, where each die includes a device, a metal stack, and a seal ring that is formed at an edge region of the die. Seal rings included in dies of the second device wafer each include a first conductive path provided with metal formed in a first opening that extends from a backside of the second device wafer, through the second device wafer, and through the bonding interface to the seal ring of a corresponding die in the first device wafer.
Public/Granted literature
- US20150349004A1 DIE SEAL RING FOR INTEGRATED CIRCUIT SYSTEM WITH STACKED DEVICE WAFERS Public/Granted day:2015-12-03
Information query
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